Weiming Zhao 436f2975ac Fix PR 18369: [Thumbv8] asserts due to inconsistent CPSR liveness of IT blocks
The issue is caused when Post-RA scheduler reorders a bundle instruction
(IT block). However, it only flips the CPSR liveness of the bundle instruction,
leaves the instructions inside the bundle unchanged, which causes inconstancy and crashes
Thumb2SizeReduction.cpp::ReduceMBB().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199127 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-13 18:47:54 +00:00
2012-10-09 23:48:34 +00:00
2013-12-04 09:42:49 +00:00
2013-12-20 00:33:39 +00:00

Low Level Virtual Machine (LLVM)
================================

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