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InstPrinter
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MCTargetDesc
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TargetInfo
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AMDGPU.h
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R600: Use LDS and vectors for private memory
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2014-06-17 16:53:14 +00:00 |
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AMDGPU.td
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R600: Use LDS and vectors for private memory
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2014-06-17 16:53:14 +00:00 |
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AMDGPUAsmPrinter.cpp
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R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget
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2014-06-13 01:32:00 +00:00 |
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AMDGPUAsmPrinter.h
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AMDGPUCallingConv.td
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AMDGPUFrameLowering.cpp
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Fix typo
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2014-06-14 04:26:07 +00:00 |
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AMDGPUFrameLowering.h
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AMDGPUInstrInfo.cpp
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R600: Remove AMDIL instruction and register definitions
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2014-06-13 16:38:59 +00:00 |
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AMDGPUInstrInfo.h
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R600: Remove AMDIL instruction and register definitions
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2014-06-13 16:38:59 +00:00 |
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AMDGPUInstrInfo.td
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R600/SI: Add intrinsics for brev instructions
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2014-06-18 17:13:57 +00:00 |
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AMDGPUInstructions.td
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R600: Remove AMDIL instruction and register definitions
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2014-06-13 16:38:59 +00:00 |
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AMDGPUIntrinsics.td
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R600/SI: Add intrinsics for brev instructions
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2014-06-18 17:13:57 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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R600: Use LDS and vectors for private memory
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2014-06-17 16:53:14 +00:00 |
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AMDGPUISelLowering.cpp
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Work around ridiculous warning.
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2014-06-18 17:45:58 +00:00 |
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AMDGPUISelLowering.h
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R600/SI: Add intrinsics for brev instructions
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2014-06-18 17:13:57 +00:00 |
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AMDGPUMachineFunction.cpp
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AMDGPUMachineFunction.h
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AMDGPUMCInstLower.cpp
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R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget
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2014-06-13 01:32:00 +00:00 |
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AMDGPUMCInstLower.h
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R600/SI: Refactor the VOP3_32 tablegen class
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2014-05-16 20:56:47 +00:00 |
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AMDGPUPromoteAlloca.cpp
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R600: Use LDS and vectors for private memory
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2014-06-17 16:53:14 +00:00 |
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AMDGPURegisterInfo.cpp
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R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget
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2014-06-13 01:32:00 +00:00 |
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AMDGPURegisterInfo.h
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R600: Remove AMDIL instruction and register definitions
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2014-06-13 16:38:59 +00:00 |
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AMDGPURegisterInfo.td
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AMDGPUSubtarget.cpp
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R600: Use LDS and vectors for private memory
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2014-06-17 16:53:14 +00:00 |
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AMDGPUSubtarget.h
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R600: Use LDS and vectors for private memory
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2014-06-17 16:53:14 +00:00 |
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AMDGPUTargetMachine.cpp
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R600: Use LDS and vectors for private memory
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2014-06-17 16:53:14 +00:00 |
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AMDGPUTargetMachine.h
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R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget
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2014-06-13 01:32:00 +00:00 |
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AMDGPUTargetTransformInfo.cpp
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AMDILCFGStructurizer.cpp
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AMDILIntrinsicInfo.cpp
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AMDILIntrinsicInfo.h
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AMDILISelLowering.cpp
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R600: Remove a few more things from AMDILISelLowering
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2014-06-15 21:08:58 +00:00 |
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CaymanInstructions.td
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R600: Expand mul24 for GPUs without it
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2014-05-22 18:00:24 +00:00 |
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CMakeLists.txt
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R600: Use LDS and vectors for private memory
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2014-06-17 16:53:14 +00:00 |
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EvergreenInstructions.td
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R600/SI: Add a pattern for llvm.AMDGPU.barrier.global
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2014-06-17 16:53:09 +00:00 |
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LLVMBuild.txt
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Makefile
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Processors.td
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R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
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R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget
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2014-06-13 01:32:00 +00:00 |
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R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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R600InstrFormats.td
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R600InstrInfo.cpp
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R600: Use LDS and vectors for private memory
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2014-06-17 16:53:14 +00:00 |
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R600InstrInfo.h
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R600: Use LDS and vectors for private memory
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2014-06-17 16:53:14 +00:00 |
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R600Instructions.td
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R600: Use LDS and vectors for private memory
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2014-06-17 16:53:14 +00:00 |
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R600Intrinsics.td
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R600ISelLowering.cpp
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R600: Implement 64bit SRA
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2014-06-18 12:27:17 +00:00 |
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R600ISelLowering.h
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R600: Implement 64bit SRL
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2014-06-18 12:27:15 +00:00 |
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget
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2014-06-13 01:32:00 +00:00 |
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R600MachineScheduler.h
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R600OptimizeVectorRegisters.cpp
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R600Packetizer.cpp
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R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget
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2014-06-13 01:32:00 +00:00 |
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R600RegisterInfo.cpp
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R600: Remove AMDIL instruction and register definitions
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2014-06-13 16:38:59 +00:00 |
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R600RegisterInfo.h
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R600: Remove AMDIL instruction and register definitions
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2014-06-13 16:38:59 +00:00 |
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R600RegisterInfo.td
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R600: Use LDS and vectors for private memory
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2014-06-17 16:53:14 +00:00 |
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R600Schedule.td
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R600TextureIntrinsicsReplacer.cpp
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R700Instructions.td
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SIAnnotateControlFlow.cpp
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SIDefines.h
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SIFixSGPRCopies.cpp
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SIInsertWaits.cpp
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SIInstrFormats.td
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R600/SI: Make sure target flags are set on pseudo VOP3 instructions
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2014-06-17 19:34:46 +00:00 |
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SIInstrInfo.cpp
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R600/SI: Add intrinsics for brev instructions
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2014-06-18 17:13:57 +00:00 |
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SIInstrInfo.h
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R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget
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2014-06-13 01:32:00 +00:00 |
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SIInstrInfo.td
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R600/SI: Prettier operand printing for 64-bit ops.
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2014-06-18 17:13:51 +00:00 |
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SIInstructions.td
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R600/SI: Add intrinsics for brev instructions
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2014-06-18 17:13:57 +00:00 |
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SIIntrinsics.td
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SIISelLowering.cpp
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R600/SI: Prettier operand printing for 64-bit ops.
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2014-06-18 17:13:51 +00:00 |
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SIISelLowering.h
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R600/SI: Use v_cvt_f32_ubyte* instructions
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2014-06-11 17:50:44 +00:00 |
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SILowerControlFlow.cpp
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R600/SI: Re-initialize the m0 register after using it for indirect addressing
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2014-06-17 16:53:04 +00:00 |
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SILowerI1Copies.cpp
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SIMachineFunctionInfo.cpp
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SIMachineFunctionInfo.h
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SIRegisterInfo.cpp
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R600: Remove AMDIL instruction and register definitions
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2014-06-13 16:38:59 +00:00 |
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SIRegisterInfo.h
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R600: Remove AMDIL instruction and register definitions
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2014-06-13 16:38:59 +00:00 |
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SIRegisterInfo.td
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SISchedule.td
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SITypeRewriter.cpp
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