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https://github.com/c64scene-ar/llvm-6502.git
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aff1c6427c
The architecture has many comparison instructions, including some that extend one of the operands. The signed comparison instructions use sign extensions and the unsigned comparison instructions use zero extensions. In cases where we had a free choice between signed or unsigned comparisons, we were trying to decide at lowering time which would best fit the available instructions, taking things like extension type into account. The code to do that was getting increasingly hairy and was also making some bad decisions. E.g. when comparing the result of two LLCs, it is better to use CR rather than CLR, since CR can be fused with a branch while CLR can't. This patch removes the lowering code and instead adds an operand to integer comparisons to say whether signed comparison is required, whether unsigned comparison is required, or whether either is OK. We can then leave the choice of instruction up to the normal isel code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190138 91177308-0d34-0410-b5e6-96231b3b80d8
191 lines
4.4 KiB
LLVM
191 lines
4.4 KiB
LLVM
; Test all condition-code masks that are relevant for CRJ.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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declare i32 @foo()
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@g1 = global i16 0
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define void @f1(i32 %target) {
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; CHECK-LABEL: f1:
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; CHECK: .cfi_def_cfa_offset
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; CHECK: .L[[LABEL:.*]]:
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; CHECK: crje %r2, {{%r[0-9]+}}, .L[[LABEL]]
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br label %loop
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loop:
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%val = call i32 @foo()
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%cond = icmp eq i32 %val, %target
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br i1 %cond, label %loop, label %exit
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exit:
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ret void
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}
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define void @f2(i32 %target) {
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; CHECK-LABEL: f2:
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; CHECK: .cfi_def_cfa_offset
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; CHECK: .L[[LABEL:.*]]:
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; CHECK: crjlh %r2, {{%r[0-9]+}}, .L[[LABEL]]
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br label %loop
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loop:
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%val = call i32 @foo()
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%cond = icmp ne i32 %val, %target
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br i1 %cond, label %loop, label %exit
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exit:
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ret void
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}
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define void @f3(i32 %target) {
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; CHECK-LABEL: f3:
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; CHECK: .cfi_def_cfa_offset
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; CHECK: .L[[LABEL:.*]]:
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; CHECK: crjle %r2, {{%r[0-9]+}}, .L[[LABEL]]
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br label %loop
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loop:
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%val = call i32 @foo()
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%cond = icmp sle i32 %val, %target
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br i1 %cond, label %loop, label %exit
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exit:
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ret void
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}
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define void @f4(i32 %target) {
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; CHECK-LABEL: f4:
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; CHECK: .cfi_def_cfa_offset
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; CHECK: .L[[LABEL:.*]]:
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; CHECK: crjl %r2, {{%r[0-9]+}}, .L[[LABEL]]
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br label %loop
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loop:
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%val = call i32 @foo()
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%cond = icmp slt i32 %val, %target
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br i1 %cond, label %loop, label %exit
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exit:
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ret void
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}
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define void @f5(i32 %target) {
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; CHECK-LABEL: f5:
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; CHECK: .cfi_def_cfa_offset
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; CHECK: .L[[LABEL:.*]]:
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; CHECK: crjh %r2, {{%r[0-9]+}}, .L[[LABEL]]
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br label %loop
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loop:
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%val = call i32 @foo()
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%cond = icmp sgt i32 %val, %target
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br i1 %cond, label %loop, label %exit
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exit:
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ret void
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}
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define void @f6(i32 %target) {
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; CHECK-LABEL: f6:
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; CHECK: .cfi_def_cfa_offset
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; CHECK: .L[[LABEL:.*]]:
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; CHECK: crjhe %r2, {{%r[0-9]+}}, .L[[LABEL]]
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br label %loop
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loop:
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%val = call i32 @foo()
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%cond = icmp sge i32 %val, %target
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br i1 %cond, label %loop, label %exit
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exit:
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ret void
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}
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; Check that CRJ is used for checking equality with a zero-extending
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; character load.
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define void @f7(i8 *%targetptr) {
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; CHECK-LABEL: f7:
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; CHECK: .cfi_def_cfa_offset
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; CHECK: .L[[LABEL:.*]]:
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; CHECK: llc [[REG:%r[0-5]]],
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; CHECK: crje %r2, [[REG]], .L[[LABEL]]
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br label %loop
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loop:
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%val = call i32 @foo()
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%byte = load i8 *%targetptr
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%target = zext i8 %byte to i32
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%cond = icmp eq i32 %val, %target
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br i1 %cond, label %loop, label %exit
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exit:
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ret void
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}
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; ...and zero-extending i16 loads.
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define void @f8(i16 *%targetptr) {
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; CHECK-LABEL: f8:
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; CHECK: .cfi_def_cfa_offset
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; CHECK: .L[[LABEL:.*]]:
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; CHECK: llh [[REG:%r[0-5]]],
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; CHECK: crje %r2, [[REG]], .L[[LABEL]]
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br label %loop
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loop:
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%val = call i32 @foo()
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%half = load i16 *%targetptr
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%target = zext i16 %half to i32
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%cond = icmp eq i32 %val, %target
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br i1 %cond, label %loop, label %exit
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exit:
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ret void
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}
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; ...unless the address is a global.
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define void @f9(i16 *%targetptr) {
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; CHECK-LABEL: f9:
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; CHECK: .cfi_def_cfa_offset
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; CHECK: .L[[LABEL:.*]]:
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; CHECK: clhrl %r2, g1
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; CHECK: je .L[[LABEL]]
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br label %loop
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loop:
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%val = call i32 @foo()
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%half = load i16 *@g1
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%target = zext i16 %half to i32
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%cond = icmp eq i32 %val, %target
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br i1 %cond, label %loop, label %exit
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exit:
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ret void
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}
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; Check that CRJ is used for checking order between two zero-extending
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; byte loads, even if the original comparison was unsigned.
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define void @f10(i8 *%targetptr1) {
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; CHECK-LABEL: f10:
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; CHECK: .cfi_def_cfa_offset
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; CHECK: .L[[LABEL:.*]]:
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; CHECK-DAG: llc [[REG1:%r[0-5]]], 0(
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; CHECK-DAG: llc [[REG2:%r[0-5]]], 1(
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; CHECK: crjl [[REG1]], [[REG2]], .L[[LABEL]]
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br label %loop
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loop:
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%val = call i32 @foo()
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%targetptr2 = getelementptr i8 *%targetptr1, i64 1
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%byte1 = load i8 *%targetptr1
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%byte2 = load i8 *%targetptr2
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%ext1 = zext i8 %byte1 to i32
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%ext2 = zext i8 %byte2 to i32
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%cond = icmp ult i32 %ext1, %ext2
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br i1 %cond, label %loop, label %exit
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exit:
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ret void
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}
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; ...likewise halfword loads.
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define void @f11(i16 *%targetptr1) {
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; CHECK-LABEL: f11:
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; CHECK: .cfi_def_cfa_offset
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; CHECK: .L[[LABEL:.*]]:
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; CHECK-DAG: llh [[REG1:%r[0-5]]], 0(
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; CHECK-DAG: llh [[REG2:%r[0-5]]], 2(
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; CHECK: crjl [[REG1]], [[REG2]], .L[[LABEL]]
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br label %loop
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loop:
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%val = call i32 @foo()
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%targetptr2 = getelementptr i16 *%targetptr1, i64 1
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%half1 = load i16 *%targetptr1
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%half2 = load i16 *%targetptr2
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%ext1 = zext i16 %half1 to i32
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%ext2 = zext i16 %half2 to i32
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%cond = icmp ult i32 %ext1, %ext2
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br i1 %cond, label %loop, label %exit
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exit:
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ret void
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}
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