llvm-6502/lib/Target
Chris Lattner 43a5ff8d40 Emit x86 instructions for: A = B op C, where A and B are 16-bit registers,
C is a constant which can be sign-extended from 8 bits without value loss,
and op is one of: add, sub, imul, and, or, xor.

This allows the JIT to emit the one byte version of the constant instead of
the two or 4 byte version.  Because these instructions are very common, this
can save a LOT of code space.  For example, I sampled two benchmarks, 176.gcc
and 254.gap.

BM        Old     New    Reduction
176.gcc 2673621 2548962  4.89%
254.gap  498261  475104  4.87%

Note that while the percentage is not spectacular, this did eliminate
124.6 _KILOBYTES_ of codespace from gcc.  Not bad.

Note that this doesn't effect the llc version at all, because the assembler
already does this optimization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9284 91177308-0d34-0410-b5e6-96231b3b80d8
2003-10-20 05:53:31 +00:00
..
CBackend Add support for the new varargs intrinsics and instructions 2003-10-18 05:57:43 +00:00
SparcV9 Change the Opcode enum for PHI nodes from "Instruction::PHINode" to "Instruction::PHI" to be more consistent with the other instructions. 2003-10-19 21:34:28 +00:00
X86 Emit x86 instructions for: A = B op C, where A and B are 16-bit registers, 2003-10-20 05:53:31 +00:00
Makefile
MRegisterInfo.cpp
Target.td Add a bunch of new node types, including a new Void dummy register class 2003-08-15 04:35:14 +00:00
TargetData.cpp Add support for 'any' pointer size and endianness 2003-08-24 13:49:22 +00:00
TargetInstrInfo.cpp
TargetMachine.cpp
TargetSchedInfo.cpp Reformatted code to match the prevalent LLVM style; fit code into 80 columns. 2003-08-05 00:02:06 +00:00