llvm-6502/test/MC/Mips/mips-reginfo-fp32.s
Daniel Sanders 6816d66d99 [mips] Add MipsOptionRecord abstraction and use it to implement .reginfo/.MIPS.options
This abstraction allows us to support the various records that can be placed in
the .MIPS.options section in the future. We currently use it to record register
usage information (the ODK_REGINFO record in our ELF64 spec).

Each .MIPS.options record should subclass MipsOptionRecord and provide an
implementation of EmitMipsOptionRecord.

Patch by Matheus Almeida and Toma Tabacu



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213522 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-21 13:30:55 +00:00

35 lines
961 B
ArmAsm

# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -filetype=obj -o - | \
# RUN: llvm-readobj -s -section-data | \
# RUN: FileCheck %s
# CHECK: Section {
# CHECK: Index:
# CHECK: Name: .reginfo
# CHECK: Type: SHT_MIPS_REGINFO (0x70000006)
# CHECK: Flags [ (0x2)
# CHECK: SHF_ALLOC (0x2)
# CHECK: ]
# CHECK: Size: 24
# CHECK: SectionData (
# CHECK: 0000: 01010101 00000000 C0007535 00000000
# CHECK: 0010: 00000000 00000000
# CHECK: )
# CHECK: }
.text
add $0,$0,$0
add $8,$0,$0
add $16,$0,$0
add $24,$0,$0
# abs.s - Reads and writes from/to $f0.
abs.s $f0,$f0
# round.w.d - Reads $f4 and $f5 and writes to $f2.
round.w.d $f2,$f4
# ceil.w.s - Reads $f8 and writes to $f10.
ceil.w.s $f10, $f8
# cvt.s.d - Reads from $f12 and $f13 and writes to $f14
cvt.s.d $f14, $f12
# abs.d - Reads from $f30 and $f31 and writes to $f30 and $f31.
abs.d $f30,$f30