llvm-6502/lib
Nadav Rotem d6fb53adb1 On AVX/AVX2 the type v8i1 is legalized to v8i16, which is an XMM sized
register. In most cases we actually compare or select YMM-sized registers
and mixing the two types creates horrible code. This commit optimizes
some of the transition sequences.

PR14657.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171148 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 08:15:45 +00:00
..
Analysis
Archive
AsmParser
Bitcode
CodeGen Refactor DAGCombinerInfo. Change the different booleans that indicate if we are before or after different runs of DAGCo, with the CombineLevel enum. 2012-12-27 06:47:41 +00:00
DebugInfo Right now all of the relocations are 32-bit dwarf, and the relocation 2012-12-27 01:07:07 +00:00
ExecutionEngine
Linker
MC
Object
Option
Support
TableGen Update tablegen parser to allow defm names to start with #NAME. 2012-12-27 06:32:52 +00:00
Target On AVX/AVX2 the type v8i1 is legalized to v8i16, which is an XMM sized 2012-12-27 08:15:45 +00:00
Transforms
VMCore
CMakeLists.txt
LLVMBuild.txt
Makefile