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Determining the address of a TLS variable results in a function call in certain TLS models. This means that a simple ICmpInst might actually result in invalidating the CTR register. In such cases, do not attempt to rely on the CTR register for loop optimization purposes. This fixes PR22034. Differential Revision: http://reviews.llvm.org/D6786 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224890 91177308-0d34-0410-b5e6-96231b3b80d8
99 lines
2.8 KiB
LLVM
99 lines
2.8 KiB
LLVM
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-freebsd10.0"
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; RUN: llc < %s -march=ppc64 -relocation-model=pic | FileCheck %s
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@a = common global i32 0, align 4
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define void @test1(i32 %c) nounwind {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%i.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%0 = load volatile i32* @a, align 4
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%add = add nsw i32 %0, %c
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store volatile i32 %add, i32* @a, align 4
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%inc = add nsw i32 %i.01, 1
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%exitcond = icmp eq i32 %inc, 2048
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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ret void
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; CHECK: @test1
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; CHECK-NOT: or 3, 3, 3
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; CHECK: mtctr
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; CHECK-NOT: addi {[0-9]+}
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; CHECK-NOT: cmplwi
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; CHECK: bdnz
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}
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define void @test2(i32 %c, i32 %d) nounwind {
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entry:
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%cmp1 = icmp sgt i32 %d, 0
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br i1 %cmp1, label %for.body, label %for.end
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for.body: ; preds = %entry, %for.body
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%i.02 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
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%0 = load volatile i32* @a, align 4
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%add = add nsw i32 %0, %c
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store volatile i32 %add, i32* @a, align 4
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%inc = add nsw i32 %i.02, 1
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%exitcond = icmp eq i32 %inc, %d
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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ret void
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; CHECK: @test2
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; CHECK: mtctr
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; CHECK-NOT: addi {[0-9]+}
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; CHECK-NOT: cmplwi
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; CHECK: bdnz
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}
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define void @test3(i32 %c, i32 %d) nounwind {
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entry:
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%cmp1 = icmp sgt i32 %d, 0
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br i1 %cmp1, label %for.body, label %for.end
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for.body: ; preds = %entry, %for.body
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%i.02 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
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%mul = mul nsw i32 %i.02, %c
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%0 = load volatile i32* @a, align 4
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%add = add nsw i32 %0, %mul
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store volatile i32 %add, i32* @a, align 4
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%inc = add nsw i32 %i.02, 1
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%exitcond = icmp eq i32 %inc, %d
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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ret void
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; CHECK: @test3
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; CHECK: mtctr
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; CHECK-NOT: addi {[0-9]+}
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; CHECK-NOT: cmplwi
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; CHECK: bdnz
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}
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@tls_var = external thread_local global i8
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define i32 @test4() {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%phi = phi i32 [ %dec, %for.body ], [ undef, %entry ]
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%load = ptrtoint i8* @tls_var to i32
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%dec = add i32 %phi, -1
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%cmp = icmp sgt i32 %phi, 1
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br i1 %cmp, label %for.body, label %return
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return: ; preds = %for.body
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ret i32 %load
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; CHECK-LABEL: @test4
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; CHECK-NOT: mtctr
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; CHECK: addi {{[0-9]+}}
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; CHECK: cmpwi
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; CHECK-NOT: bdnz
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; CHECK: bgt
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}
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