Owen Anderson 3a9e7690ba Use a more efficient lowering of uint64_t --> float that can take advantage of hardware signed integer conversion without ... having to do a double cast (uint64_t --> double --> float). This is based on the algorithm from compiler_rt's __floatundisf for X86-64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115634 91177308-0d34-0410-b5e6-96231b3b80d8		2010-10-05 17:24:05 +00:00
..
CMakeLists.txt	Removed a bunch of unnecessary target_link_libraries.	2010-09-28 22:39:14 +00:00
DAGCombiner.cpp	This DAG combine BRCOND transformation can look pass truncate of the operand:	2010-10-04 22:41:01 +00:00
FastISel.cpp	Use frame index, if available for byval argument while lowering dbg_declare. Otherwise let getRegForValue() find register for this argument.	2010-09-14 20:29:31 +00:00
FunctionLoweringInfo.cpp	Reapply r112623. Included additional check for unused byval argument.	2010-08-31 22:22:42 +00:00
InstrEmitter.cpp	Revert r112461. It was failing on PPC...	2010-08-30 04:36:50 +00:00
InstrEmitter.h
LegalizeDAG.cpp	Use a more efficient lowering of uint64_t --> float that can take advantage of hardware signed integer conversion without	2010-10-05 17:24:05 +00:00
LegalizeFloatTypes.cpp	update a bunch of code to use the MachinePointerInfo version of getStore.	2010-09-21 18:41:36 +00:00
LegalizeIntegerTypes.cpp	propagate MachinePointerInfo through various uses of the old	2010-09-21 17:04:51 +00:00
LegalizeTypes.cpp	continue MachinePointerInfo'izing, eliminating use of one of the old	2010-09-21 16:36:31 +00:00
LegalizeTypes.h	implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1.	2010-08-26 05:51:22 +00:00
LegalizeTypesGeneric.cpp	update a bunch of code to use the MachinePointerInfo version of getStore.	2010-09-21 18:41:36 +00:00
LegalizeVectorOps.cpp
LegalizeVectorTypes.cpp	Don't try to make a vector of x86mmx; this won't work,	2010-09-27 17:29:14 +00:00
Makefile
ScheduleDAGFast.cpp	Make fast scheduler handle asm clobbers correctly.	2010-08-17 22:17:24 +00:00
ScheduleDAGList.cpp
ScheduleDAGRRList.cpp
ScheduleDAGSDNodes.cpp	Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMP	2010-09-29 22:42:35 +00:00
ScheduleDAGSDNodes.h	Teach if-converter to be more careful with predicating instructions that would	2010-09-10 01:29:16 +00:00
SDNodeDbgValue.h
SDNodeOrdering.h
SelectionDAG.cpp	finish pushing MachinePointerInfo through selectiondags. At this point,	2010-09-21 18:58:22 +00:00
SelectionDAGBuilder.cpp	Fix code gen crash reported in PR 8235. We still lose debug info for the unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case.	2010-10-01 19:00:44 +00:00
SelectionDAGBuilder.h	When isel is emitting instructions for an x86 target without CMOV, the CFG is	2010-09-30 19:44:31 +00:00
SelectionDAGISel.cpp	When isel is emitting instructions for an x86 target without CMOV, the CFG is	2010-09-30 19:44:31 +00:00
SelectionDAGPrinter.cpp
TargetLowering.cpp	Fixed pr20314-2.c failure, added E, F, p constraint letters.	2010-09-21 22:04:54 +00:00
TargetSelectionDAGInfo.cpp