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dcc4f724cc
This patch adds a new SSA MI pass that runs on little-endian PPC64 code with VSX enabled. Loads and stores of 4x32 and 2x64 vectors without alignment constraints are accomplished for little-endian using lxvd2x/xxswapd and xxswapd/stxvd2x. The existence of the additional xxswapd instructions hurts performance in comparison with big-endian code, but they are necessary in the general case to support correct semantics. However, the general case does not apply to most vector code. Many vector instructions are lane-insensitive; they do not "care" which lanes the parallel computations are performed within, provided that the resulting data is stored into the correct locations. Thus this pass looks for computations that perform only lane-insensitive operations, and remove the unnecessary swaps from loads and stores in such computations. Future improvements will allow computations using certain lane-sensitive operations to also be optimized in this manner, by modifying the lane-sensitive operations to account for the permuted order of the lanes. However, this patch only adds the infrastructure to permit this; no lane-sensitive operations are optimized at this time. This code is heavily exercised by the various vectorizing applications in the projects/test-suite tree. For the time being, I have only added one simple test case to demonstrate what the pass is doing. Although it is quite simple, it provides coverage for much of the code, including the special case handling of copies and subreg-to-reg operations feeding the swaps. I plan to add additional tests in the future as I fill in more of the "special handling" code. Two existing tests were affected, because they expected the swaps to be present, but they are now removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235910 91177308-0d34-0410-b5e6-96231b3b80d8
103 lines
3.3 KiB
C++
103 lines
3.3 KiB
C++
//===-- PPC.h - Top-level interface for PowerPC Target ----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the LLVM
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// PowerPC back-end.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_POWERPC_PPC_H
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#define LLVM_LIB_TARGET_POWERPC_PPC_H
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#include "MCTargetDesc/PPCMCTargetDesc.h"
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#include <string>
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// GCC #defines PPC on Linux but we use it as our namespace name
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#undef PPC
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namespace llvm {
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class PPCTargetMachine;
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class PassRegistry;
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class FunctionPass;
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class ImmutablePass;
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class MachineInstr;
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class AsmPrinter;
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class MCInst;
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FunctionPass *createPPCCTRLoops(PPCTargetMachine &TM);
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#ifndef NDEBUG
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FunctionPass *createPPCCTRLoopsVerify();
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#endif
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FunctionPass *createPPCLoopDataPrefetchPass();
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FunctionPass *createPPCLoopPreIncPrepPass(PPCTargetMachine &TM);
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FunctionPass *createPPCEarlyReturnPass();
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FunctionPass *createPPCVSXCopyPass();
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FunctionPass *createPPCVSXFMAMutatePass();
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FunctionPass *createPPCVSXSwapRemovalPass();
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FunctionPass *createPPCBranchSelectionPass();
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FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
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FunctionPass *createPPCTLSDynamicCallPass();
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void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
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AsmPrinter &AP, bool isDarwin);
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void initializePPCVSXFMAMutatePass(PassRegistry&);
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extern char &PPCVSXFMAMutateID;
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namespace PPCII {
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/// Target Operand Flag enum.
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enum TOF {
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//===------------------------------------------------------------------===//
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// PPC Specific MachineOperand flags.
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MO_NO_FLAG,
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/// MO_PLT_OR_STUB - On a symbol operand "FOO", this indicates that the
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/// reference is actually to the "FOO$stub" or "FOO@plt" symbol. This is
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/// used for calls and jumps to external functions on Tiger and earlier, and
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/// for PIC calls on Linux and ELF systems.
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MO_PLT_OR_STUB = 1,
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/// MO_PIC_FLAG - If this bit is set, the symbol reference is relative to
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/// the function's picbase, e.g. lo16(symbol-picbase).
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MO_PIC_FLAG = 2,
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/// MO_NLP_FLAG - If this bit is set, the symbol reference is actually to
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/// the non_lazy_ptr for the global, e.g. lo16(symbol$non_lazy_ptr-picbase).
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MO_NLP_FLAG = 4,
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/// MO_NLP_HIDDEN_FLAG - If this bit is set, the symbol reference is to a
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/// symbol with hidden visibility. This causes a different kind of
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/// non-lazy-pointer to be generated.
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MO_NLP_HIDDEN_FLAG = 8,
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/// The next are not flags but distinct values.
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MO_ACCESS_MASK = 0xf0,
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/// MO_LO, MO_HA - lo16(symbol) and ha16(symbol)
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MO_LO = 1 << 4,
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MO_HA = 2 << 4,
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MO_TPREL_LO = 4 << 4,
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MO_TPREL_HA = 3 << 4,
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/// These values identify relocations on immediates folded
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/// into memory operations.
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MO_DTPREL_LO = 5 << 4,
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MO_TLSLD_LO = 6 << 4,
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MO_TOC_LO = 7 << 4,
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// Symbol for VK_PPC_TLS fixup attached to an ADD instruction
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MO_TLS = 8 << 4
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};
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} // end namespace PPCII
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} // end namespace llvm;
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#endif
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