NAKAMURA Takumi 4491aa49b3 test/CodeGen/X86/byval*.ll: Win64 has not supported byval yet. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127731 91177308-0d34-0410-b5e6-96231b3b80d8		2011-03-16 13:52:20 +00:00
..
Alpha
ARM	Some minor cleanups based on feedback.	2011-03-15 20:47:26 +00:00
Blackfin	Be nice to Xcore and the XMOS assembler and avoid quoting section names	2011-03-04 20:03:14 +00:00
CBackend
CellSPU	Roll r127459 back in:	2011-03-11 21:52:04 +00:00
CPP
Generic	Make this test x86 specific because the ARM backend can't handle it.	2011-02-28 12:30:47 +00:00
MBlaze
Mips	Revert "Re-enable test and hope to silence the buildbots", still broken.	2011-03-09 22:48:46 +00:00
MSP430
PowerPC	Fix mistyped CHECK lines.	2011-03-09 22:07:31 +00:00
PTX	PTX: Set PTX 2.0 as the minimum supported version	2011-03-15 13:24:15 +00:00
SPARC
SystemZ
Thumb	Roll r127459 back in:	2011-03-11 21:52:04 +00:00
Thumb2	Roll r127459 back in:	2011-03-11 21:52:04 +00:00
X86	test/CodeGen/X86/byval*.ll: Win64 has not supported byval yet.	2011-03-16 13:52:20 +00:00
XCore	On the XCore the scavenging slot should be closest to the SP.	2011-03-15 15:10:11 +00:00