llvm-6502/test
Hal Finkel 44b2b9dc1a [PowerPC] Add subregister classes for f64 VSX values
We had stored both f64 values and v2f64, etc. values in the VSX registers. This
worked, but was suboptimal because we would always spill 16-byte values even
through we almost always had scalar 8-byte values. This resulted in an
increase in stack-size use, extra memory bandwidth, etc. To fix this, I've
added 64-bit subregisters of the Altivec registers, and combined those with the
existing scalar floating-point registers to form a class of VSX scalar
floating-point registers. The ABI code has also been enhanced to use this
register class and some other necessary improvements have been made.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205075 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 05:29:01 +00:00
..
Analysis
Assembler
Bindings
Bitcode All new elements except the last one initialized to NULL. Ideally, once parsing is complete, all elements should be non-NULL. 2014-03-27 12:08:23 +00:00
BugPoint
CodeGen [PowerPC] Add subregister classes for f64 VSX values 2014-03-29 05:29:01 +00:00
DebugInfo Add a PR reference 2014-03-27 08:52:14 +00:00
ExecutionEngine
Feature Prevent alias from pointing to weak aliases. 2014-03-27 15:26:56 +00:00
FileCheck
Instrumentation
Integer
JitListener
Linker
LTO
MC Debug Compression: Avoid compression debug_frame for now 2014-03-28 21:48:31 +00:00
Object
Other
TableGen
tools
Transforms SLPVectorizer: Take credit for free extractelement instructions 2014-03-28 17:21:32 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg llvm-mc: error when -compress-debug-sections is requested and zlib is not linked 2014-03-28 20:45:24 +00:00
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh