llvm-6502/test/CodeGen
Evan Cheng 44be1a8d66 Enable machine sinking critical edge splitting. e.g.
define double @foo(double %x, double %y, i1 %c) nounwind {
  %a = fdiv double %x, 3.2
  %z = select i1 %c, double %a, double %y
  ret double %z
}

Was:
_foo:
        divsd   LCPI0_0(%rip), %xmm0
        testb   $1, %dil
        jne     LBB0_2
        movaps  %xmm1, %xmm0
LBB0_2:
        ret

Now:
_foo:
        testb   $1, %dil
        je      LBB0_2
        divsd   LCPI0_0(%rip), %xmm0
        ret
LBB0_2:
        movaps  %xmm1, %xmm0
        ret

This avoids the divsd when early exit is taken.
rdar://8454886


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114372 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-20 22:52:00 +00:00
..
Alpha
ARM Simplify ARM callee-saved register handling by removing the distinction 2010-09-20 19:32:20 +00:00
Blackfin
CBackend
CellSPU Change SPU register re-interpretations from OR to COPY_TO_REGCLASS instruction. 2010-09-16 12:29:33 +00:00
CPP
Generic
MBlaze
Mips Enable machine sinking critical edge splitting. e.g. 2010-09-20 22:52:00 +00:00
MSP430 CombinerAA is now reordering these stores. 2010-09-20 20:56:29 +00:00
PIC16
PowerPC
PTX Add the exit instruction to the PTX target. 2010-09-18 18:52:28 +00:00
SPARC
SystemZ Correct bogus module triple specifications. 2010-08-30 10:48:29 +00:00
Thumb Re-enable usage of the ARM base pointer. r113394 fixed the known failures. 2010-09-08 20:12:02 +00:00
Thumb2 Simplify ARM callee-saved register handling by removing the distinction 2010-09-20 19:32:20 +00:00
X86 Enable machine sinking critical edge splitting. e.g. 2010-09-20 22:52:00 +00:00
XCore Enable machine sinking critical edge splitting. e.g. 2010-09-20 22:52:00 +00:00