mirror of
https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37066 91177308-0d34-0410-b5e6-96231b3b80d8
1278 lines
49 KiB
C++
1278 lines
49 KiB
C++
//===-- ARMConstantIslandPass.cpp - ARM constant islands --------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Chris Lattner and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a pass that splits the constant pool up into 'islands'
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// which are scattered through-out the function. This is required due to the
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// limited pc-relative displacements that ARM has.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "arm-cp-islands"
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#include "ARM.h"
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#include "ARMMachineFunctionInfo.h"
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#include "ARMInstrInfo.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/Statistic.h"
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using namespace llvm;
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STATISTIC(NumCPEs, "Number of constpool entries");
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STATISTIC(NumSplit, "Number of uncond branches inserted");
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STATISTIC(NumCBrFixed, "Number of cond branches fixed");
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STATISTIC(NumUBrFixed, "Number of uncond branches fixed");
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namespace {
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/// ARMConstantIslands - Due to limited PC-relative displacements, ARM
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/// requires constant pool entries to be scattered among the instructions
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/// inside a function. To do this, it completely ignores the normal LLVM
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/// constant pool; instead, it places constants wherever it feels like with
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/// special instructions.
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///
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/// The terminology used in this pass includes:
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/// Islands - Clumps of constants placed in the function.
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/// Water - Potential places where an island could be formed.
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/// CPE - A constant pool entry that has been placed somewhere, which
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/// tracks a list of users.
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class VISIBILITY_HIDDEN ARMConstantIslands : public MachineFunctionPass {
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/// NextUID - Assign unique ID's to CPE's.
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unsigned NextUID;
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/// BBSizes - The size of each MachineBasicBlock in bytes of code, indexed
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/// by MBB Number. The two-byte pads required for Thumb alignment are
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/// counted as part of the following block (i.e., the offset and size for
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/// a padded block will both be ==2 mod 4).
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std::vector<unsigned> BBSizes;
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/// BBOffsets - the offset of each MBB in bytes, starting from 0.
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/// The two-byte pads required for Thumb alignment are counted as part of
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/// the following block.
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std::vector<unsigned> BBOffsets;
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/// WaterList - A sorted list of basic blocks where islands could be placed
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/// (i.e. blocks that don't fall through to the following block, due
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/// to a return, unreachable, or unconditional branch).
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std::vector<MachineBasicBlock*> WaterList;
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/// CPUser - One user of a constant pool, keeping the machine instruction
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/// pointer, the constant pool being referenced, and the max displacement
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/// allowed from the instruction to the CP.
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struct CPUser {
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MachineInstr *MI;
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MachineInstr *CPEMI;
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unsigned MaxDisp;
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CPUser(MachineInstr *mi, MachineInstr *cpemi, unsigned maxdisp)
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: MI(mi), CPEMI(cpemi), MaxDisp(maxdisp) {}
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};
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/// CPUsers - Keep track of all of the machine instructions that use various
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/// constant pools and their max displacement.
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std::vector<CPUser> CPUsers;
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/// CPEntry - One per constant pool entry, keeping the machine instruction
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/// pointer, the constpool index, and the number of CPUser's which
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/// reference this entry.
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struct CPEntry {
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MachineInstr *CPEMI;
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unsigned CPI;
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unsigned RefCount;
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CPEntry(MachineInstr *cpemi, unsigned cpi, unsigned rc = 0)
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: CPEMI(cpemi), CPI(cpi), RefCount(rc) {}
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};
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/// CPEntries - Keep track of all of the constant pool entry machine
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/// instructions. For each original constpool index (i.e. those that
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/// existed upon entry to this pass), it keeps a vector of entries.
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/// Original elements are cloned as we go along; the clones are
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/// put in the vector of the original element, but have distinct CPIs.
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std::vector<std::vector<CPEntry> > CPEntries;
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/// ImmBranch - One per immediate branch, keeping the machine instruction
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/// pointer, conditional or unconditional, the max displacement,
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/// and (if isCond is true) the corresponding unconditional branch
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/// opcode.
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struct ImmBranch {
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MachineInstr *MI;
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unsigned MaxDisp : 31;
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bool isCond : 1;
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int UncondBr;
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ImmBranch(MachineInstr *mi, unsigned maxdisp, bool cond, int ubr)
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: MI(mi), MaxDisp(maxdisp), isCond(cond), UncondBr(ubr) {}
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};
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/// Branches - Keep track of all the immediate branch instructions.
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///
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std::vector<ImmBranch> ImmBranches;
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/// PushPopMIs - Keep track of all the Thumb push / pop instructions.
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///
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SmallVector<MachineInstr*, 4> PushPopMIs;
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/// HasFarJump - True if any far jump instruction has been emitted during
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/// the branch fix up pass.
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bool HasFarJump;
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const TargetInstrInfo *TII;
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ARMFunctionInfo *AFI;
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bool isThumb;
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public:
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static char ID;
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ARMConstantIslands() : MachineFunctionPass((intptr_t)&ID) {}
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virtual bool runOnMachineFunction(MachineFunction &Fn);
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virtual const char *getPassName() const {
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return "ARM constant island placement and branch shortening pass";
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}
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private:
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void DoInitialPlacement(MachineFunction &Fn,
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std::vector<MachineInstr*> &CPEMIs);
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CPEntry *findConstPoolEntry(unsigned CPI, const MachineInstr *CPEMI);
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void InitialFunctionScan(MachineFunction &Fn,
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const std::vector<MachineInstr*> &CPEMIs);
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MachineBasicBlock *SplitBlockBeforeInstr(MachineInstr *MI);
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void UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB);
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void AdjustBBOffsetsAfter(MachineBasicBlock *BB, int delta);
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bool DecrementOldEntry(unsigned CPI, MachineInstr* CPEMI);
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int LookForExistingCPEntry(CPUser& U, unsigned UserOffset);
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bool LookForWater(CPUser&U, unsigned UserOffset,
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MachineBasicBlock** NewMBB);
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MachineBasicBlock* AcceptWater(MachineBasicBlock *WaterBB,
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std::vector<MachineBasicBlock*>::iterator IP);
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void CreateNewWater(unsigned CPUserIndex, unsigned UserOffset,
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MachineBasicBlock** NewMBB);
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bool HandleConstantPoolUser(MachineFunction &Fn, unsigned CPUserIndex);
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void RemoveDeadCPEMI(MachineInstr *CPEMI);
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bool RemoveUnusedCPEntries();
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bool CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
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MachineInstr *CPEMI, unsigned Disp,
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bool DoDump);
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bool WaterIsInRange(unsigned UserOffset, MachineBasicBlock *Water,
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unsigned Disp);
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bool OffsetIsInRange(unsigned UserOffset, unsigned TrialOffset,
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unsigned Disp, bool NegativeOK);
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bool BBIsInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp);
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bool FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br);
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bool FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br);
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bool FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br);
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bool UndoLRSpillRestore();
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unsigned GetOffsetOf(MachineInstr *MI) const;
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void dumpBBs();
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void verify(MachineFunction &Fn);
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};
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char ARMConstantIslands::ID = 0;
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}
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/// verify - check BBOffsets, BBSizes, alignment of islands
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void ARMConstantIslands::verify(MachineFunction &Fn) {
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assert(BBOffsets.size() == BBSizes.size());
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for (unsigned i = 1, e = BBOffsets.size(); i != e; ++i)
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assert(BBOffsets[i-1]+BBSizes[i-1] == BBOffsets[i]);
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if (isThumb) {
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for (MachineFunction::iterator MBBI = Fn.begin(), E = Fn.end();
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MBBI != E; ++MBBI) {
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MachineBasicBlock *MBB = MBBI;
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if (!MBB->empty() &&
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MBB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY)
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assert((BBOffsets[MBB->getNumber()]%4 == 0 &&
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BBSizes[MBB->getNumber()]%4 == 0) ||
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(BBOffsets[MBB->getNumber()]%4 != 0 &&
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BBSizes[MBB->getNumber()]%4 != 0));
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}
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}
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}
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/// print block size and offset information - debugging
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void ARMConstantIslands::dumpBBs() {
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for (unsigned J = 0, E = BBOffsets.size(); J !=E; ++J) {
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DOUT << "block" << J << " offset" << BBOffsets[J] <<
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" size" << BBSizes[J] << "\n";
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}
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}
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/// createARMConstantIslandPass - returns an instance of the constpool
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/// island pass.
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FunctionPass *llvm::createARMConstantIslandPass() {
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return new ARMConstantIslands();
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}
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bool ARMConstantIslands::runOnMachineFunction(MachineFunction &Fn) {
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MachineConstantPool &MCP = *Fn.getConstantPool();
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TII = Fn.getTarget().getInstrInfo();
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AFI = Fn.getInfo<ARMFunctionInfo>();
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isThumb = AFI->isThumbFunction();
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HasFarJump = false;
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// Renumber all of the machine basic blocks in the function, guaranteeing that
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// the numbers agree with the position of the block in the function.
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Fn.RenumberBlocks();
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/// Thumb functions containing constant pools get 2-byte alignment. This is so
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/// we can keep exact track of where the alignment padding goes. Set default.
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AFI->setAlign(isThumb ? 1U : 2U);
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// Perform the initial placement of the constant pool entries. To start with,
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// we put them all at the end of the function.
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std::vector<MachineInstr*> CPEMIs;
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if (!MCP.isEmpty()) {
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DoInitialPlacement(Fn, CPEMIs);
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if (isThumb)
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AFI->setAlign(2U);
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}
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/// The next UID to take is the first unused one.
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NextUID = CPEMIs.size();
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// Do the initial scan of the function, building up information about the
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// sizes of each block, the location of all the water, and finding all of the
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// constant pool users.
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InitialFunctionScan(Fn, CPEMIs);
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CPEMIs.clear();
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/// Remove dead constant pool entries.
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RemoveUnusedCPEntries();
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// Iteratively place constant pool entries and fix up branches until there
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// is no change.
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bool MadeChange = false;
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while (true) {
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bool Change = false;
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for (unsigned i = 0, e = CPUsers.size(); i != e; ++i)
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Change |= HandleConstantPoolUser(Fn, i);
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DEBUG(dumpBBs());
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for (unsigned i = 0, e = ImmBranches.size(); i != e; ++i)
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Change |= FixUpImmediateBr(Fn, ImmBranches[i]);
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DEBUG(dumpBBs());
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if (!Change)
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break;
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MadeChange = true;
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}
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// After a while, this might be made debug-only, but it is not expensive.
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verify(Fn);
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// If LR has been forced spilled and no far jumps (i.e. BL) has been issued.
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// Undo the spill / restore of LR if possible.
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if (!HasFarJump && AFI->isLRSpilledForFarJump() && isThumb)
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MadeChange |= UndoLRSpillRestore();
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BBSizes.clear();
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BBOffsets.clear();
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WaterList.clear();
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CPUsers.clear();
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CPEntries.clear();
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ImmBranches.clear();
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PushPopMIs.clear();
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return MadeChange;
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}
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/// DoInitialPlacement - Perform the initial placement of the constant pool
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/// entries. To start with, we put them all at the end of the function.
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void ARMConstantIslands::DoInitialPlacement(MachineFunction &Fn,
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std::vector<MachineInstr*> &CPEMIs){
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// Create the basic block to hold the CPE's.
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MachineBasicBlock *BB = new MachineBasicBlock();
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Fn.getBasicBlockList().push_back(BB);
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// Add all of the constants from the constant pool to the end block, use an
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// identity mapping of CPI's to CPE's.
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const std::vector<MachineConstantPoolEntry> &CPs =
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Fn.getConstantPool()->getConstants();
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const TargetData &TD = *Fn.getTarget().getTargetData();
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for (unsigned i = 0, e = CPs.size(); i != e; ++i) {
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unsigned Size = TD.getTypeSize(CPs[i].getType());
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// Verify that all constant pool entries are a multiple of 4 bytes. If not,
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// we would have to pad them out or something so that instructions stay
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// aligned.
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assert((Size & 3) == 0 && "CP Entry not multiple of 4 bytes!");
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MachineInstr *CPEMI =
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BuildMI(BB, TII->get(ARM::CONSTPOOL_ENTRY))
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.addImm(i).addConstantPoolIndex(i).addImm(Size);
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CPEMIs.push_back(CPEMI);
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// Add a new CPEntry, but no corresponding CPUser yet.
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std::vector<CPEntry> CPEs;
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CPEs.push_back(CPEntry(CPEMI, i));
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CPEntries.push_back(CPEs);
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NumCPEs++;
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DOUT << "Moved CPI#" << i << " to end of function as #" << i << "\n";
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}
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}
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/// BBHasFallthrough - Return true if the specified basic block can fallthrough
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/// into the block immediately after it.
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static bool BBHasFallthrough(MachineBasicBlock *MBB) {
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// Get the next machine basic block in the function.
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MachineFunction::iterator MBBI = MBB;
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if (next(MBBI) == MBB->getParent()->end()) // Can't fall off end of function.
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return false;
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MachineBasicBlock *NextBB = next(MBBI);
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for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(),
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E = MBB->succ_end(); I != E; ++I)
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if (*I == NextBB)
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return true;
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return false;
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}
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/// findConstPoolEntry - Given the constpool index and CONSTPOOL_ENTRY MI,
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/// look up the corresponding CPEntry.
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ARMConstantIslands::CPEntry
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*ARMConstantIslands::findConstPoolEntry(unsigned CPI,
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const MachineInstr *CPEMI) {
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std::vector<CPEntry> &CPEs = CPEntries[CPI];
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// Number of entries per constpool index should be small, just do a
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// linear search.
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for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
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if (CPEs[i].CPEMI == CPEMI)
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return &CPEs[i];
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}
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return NULL;
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}
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/// InitialFunctionScan - Do the initial scan of the function, building up
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/// information about the sizes of each block, the location of all the water,
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/// and finding all of the constant pool users.
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void ARMConstantIslands::InitialFunctionScan(MachineFunction &Fn,
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const std::vector<MachineInstr*> &CPEMIs) {
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unsigned Offset = 0;
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for (MachineFunction::iterator MBBI = Fn.begin(), E = Fn.end();
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MBBI != E; ++MBBI) {
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MachineBasicBlock &MBB = *MBBI;
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// If this block doesn't fall through into the next MBB, then this is
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// 'water' that a constant pool island could be placed.
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if (!BBHasFallthrough(&MBB))
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WaterList.push_back(&MBB);
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unsigned MBBSize = 0;
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for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
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I != E; ++I) {
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// Add instruction size to MBBSize.
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MBBSize += ARM::GetInstSize(I);
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int Opc = I->getOpcode();
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if (TII->isBranch(Opc)) {
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bool isCond = false;
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unsigned Bits = 0;
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unsigned Scale = 1;
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int UOpc = Opc;
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switch (Opc) {
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case ARM::tBR_JTr:
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// A Thumb table jump may involve padding; for the offsets to
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// be right, functions containing these must be 4-byte aligned.
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AFI->setAlign(2U);
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if ((Offset+MBBSize)%4 != 0)
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MBBSize += 2; // padding
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continue; // Does not get an entry in ImmBranches
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default:
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continue; // Ignore other JT branches
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case ARM::Bcc:
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isCond = true;
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UOpc = ARM::B;
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// Fallthrough
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case ARM::B:
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Bits = 24;
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Scale = 4;
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break;
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case ARM::tBcc:
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isCond = true;
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UOpc = ARM::tB;
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Bits = 8;
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Scale = 2;
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break;
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case ARM::tB:
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Bits = 11;
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Scale = 2;
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break;
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}
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// Record this immediate branch.
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unsigned MaxOffs = ((1 << (Bits-1))-1) * Scale;
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ImmBranches.push_back(ImmBranch(I, MaxOffs, isCond, UOpc));
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}
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if (Opc == ARM::tPUSH || Opc == ARM::tPOP_RET)
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PushPopMIs.push_back(I);
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// Scan the instructions for constant pool operands.
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for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op)
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if (I->getOperand(op).isConstantPoolIndex()) {
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// We found one. The addressing mode tells us the max displacement
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// from the PC that this instruction permits.
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// Basic size info comes from the TSFlags field.
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unsigned Bits = 0;
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unsigned Scale = 1;
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unsigned TSFlags = I->getInstrDescriptor()->TSFlags;
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switch (TSFlags & ARMII::AddrModeMask) {
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default:
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// Constant pool entries can reach anything.
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if (I->getOpcode() == ARM::CONSTPOOL_ENTRY)
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continue;
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if (I->getOpcode() == ARM::tLEApcrel) {
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Bits = 8; // Taking the address of a CP entry.
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break;
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}
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assert(0 && "Unknown addressing mode for CP reference!");
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case ARMII::AddrMode1: // AM1: 8 bits << 2
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Bits = 8;
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Scale = 4; // Taking the address of a CP entry.
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break;
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case ARMII::AddrMode2:
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Bits = 12; // +-offset_12
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break;
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case ARMII::AddrMode3:
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Bits = 8; // +-offset_8
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break;
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// addrmode4 has no immediate offset.
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case ARMII::AddrMode5:
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Bits = 8;
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Scale = 4; // +-(offset_8*4)
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break;
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case ARMII::AddrModeT1:
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Bits = 5; // +offset_5
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break;
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case ARMII::AddrModeT2:
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Bits = 5;
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Scale = 2; // +(offset_5*2)
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break;
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case ARMII::AddrModeT4:
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Bits = 5;
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Scale = 4; // +(offset_5*4)
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break;
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case ARMII::AddrModeTs:
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Bits = 8;
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Scale = 4; // +(offset_8*4)
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break;
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}
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// Remember that this is a user of a CP entry.
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unsigned CPI = I->getOperand(op).getConstantPoolIndex();
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MachineInstr *CPEMI = CPEMIs[CPI];
|
|
unsigned MaxOffs = ((1 << Bits)-1) * Scale;
|
|
CPUsers.push_back(CPUser(I, CPEMI, MaxOffs));
|
|
|
|
// Increment corresponding CPEntry reference count.
|
|
CPEntry *CPE = findConstPoolEntry(CPI, CPEMI);
|
|
assert(CPE && "Cannot find a corresponding CPEntry!");
|
|
CPE->RefCount++;
|
|
|
|
// Instructions can only use one CP entry, don't bother scanning the
|
|
// rest of the operands.
|
|
break;
|
|
}
|
|
}
|
|
|
|
// In thumb mode, if this block is a constpool island, we may need padding
|
|
// so it's aligned on 4 byte boundary.
|
|
if (isThumb &&
|
|
!MBB.empty() &&
|
|
MBB.begin()->getOpcode() == ARM::CONSTPOOL_ENTRY &&
|
|
(Offset%4) != 0)
|
|
MBBSize += 2;
|
|
|
|
BBSizes.push_back(MBBSize);
|
|
BBOffsets.push_back(Offset);
|
|
Offset += MBBSize;
|
|
}
|
|
}
|
|
|
|
/// GetOffsetOf - Return the current offset of the specified machine instruction
|
|
/// from the start of the function. This offset changes as stuff is moved
|
|
/// around inside the function.
|
|
unsigned ARMConstantIslands::GetOffsetOf(MachineInstr *MI) const {
|
|
MachineBasicBlock *MBB = MI->getParent();
|
|
|
|
// The offset is composed of two things: the sum of the sizes of all MBB's
|
|
// before this instruction's block, and the offset from the start of the block
|
|
// it is in.
|
|
unsigned Offset = BBOffsets[MBB->getNumber()];
|
|
|
|
// If we're looking for a CONSTPOOL_ENTRY in Thumb, see if this block has
|
|
// alignment padding, and compensate if so.
|
|
if (isThumb &&
|
|
MI->getOpcode() == ARM::CONSTPOOL_ENTRY &&
|
|
Offset%4 != 0)
|
|
Offset += 2;
|
|
|
|
// Sum instructions before MI in MBB.
|
|
for (MachineBasicBlock::iterator I = MBB->begin(); ; ++I) {
|
|
assert(I != MBB->end() && "Didn't find MI in its own basic block?");
|
|
if (&*I == MI) return Offset;
|
|
Offset += ARM::GetInstSize(I);
|
|
}
|
|
}
|
|
|
|
/// CompareMBBNumbers - Little predicate function to sort the WaterList by MBB
|
|
/// ID.
|
|
static bool CompareMBBNumbers(const MachineBasicBlock *LHS,
|
|
const MachineBasicBlock *RHS) {
|
|
return LHS->getNumber() < RHS->getNumber();
|
|
}
|
|
|
|
/// UpdateForInsertedWaterBlock - When a block is newly inserted into the
|
|
/// machine function, it upsets all of the block numbers. Renumber the blocks
|
|
/// and update the arrays that parallel this numbering.
|
|
void ARMConstantIslands::UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB) {
|
|
// Renumber the MBB's to keep them consequtive.
|
|
NewBB->getParent()->RenumberBlocks(NewBB);
|
|
|
|
// Insert a size into BBSizes to align it properly with the (newly
|
|
// renumbered) block numbers.
|
|
BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
|
|
|
|
// Likewise for BBOffsets.
|
|
BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
|
|
|
|
// Next, update WaterList. Specifically, we need to add NewMBB as having
|
|
// available water after it.
|
|
std::vector<MachineBasicBlock*>::iterator IP =
|
|
std::lower_bound(WaterList.begin(), WaterList.end(), NewBB,
|
|
CompareMBBNumbers);
|
|
WaterList.insert(IP, NewBB);
|
|
}
|
|
|
|
|
|
/// Split the basic block containing MI into two blocks, which are joined by
|
|
/// an unconditional branch. Update datastructures and renumber blocks to
|
|
/// account for this change and returns the newly created block.
|
|
MachineBasicBlock *ARMConstantIslands::SplitBlockBeforeInstr(MachineInstr *MI) {
|
|
MachineBasicBlock *OrigBB = MI->getParent();
|
|
|
|
// Create a new MBB for the code after the OrigBB.
|
|
MachineBasicBlock *NewBB = new MachineBasicBlock(OrigBB->getBasicBlock());
|
|
MachineFunction::iterator MBBI = OrigBB; ++MBBI;
|
|
OrigBB->getParent()->getBasicBlockList().insert(MBBI, NewBB);
|
|
|
|
// Splice the instructions starting with MI over to NewBB.
|
|
NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end());
|
|
|
|
// Add an unconditional branch from OrigBB to NewBB.
|
|
// Note the new unconditional branch is not being recorded.
|
|
BuildMI(OrigBB, TII->get(isThumb ? ARM::tB : ARM::B)).addMBB(NewBB);
|
|
NumSplit++;
|
|
|
|
// Update the CFG. All succs of OrigBB are now succs of NewBB.
|
|
while (!OrigBB->succ_empty()) {
|
|
MachineBasicBlock *Succ = *OrigBB->succ_begin();
|
|
OrigBB->removeSuccessor(Succ);
|
|
NewBB->addSuccessor(Succ);
|
|
|
|
// This pass should be run after register allocation, so there should be no
|
|
// PHI nodes to update.
|
|
assert((Succ->empty() || Succ->begin()->getOpcode() != TargetInstrInfo::PHI)
|
|
&& "PHI nodes should be eliminated by now!");
|
|
}
|
|
|
|
// OrigBB branches to NewBB.
|
|
OrigBB->addSuccessor(NewBB);
|
|
|
|
// Update internal data structures to account for the newly inserted MBB.
|
|
// This is almost the same as UpdateForInsertedWaterBlock, except that
|
|
// the Water goes after OrigBB, not NewBB.
|
|
NewBB->getParent()->RenumberBlocks(NewBB);
|
|
|
|
// Insert a size into BBSizes to align it properly with the (newly
|
|
// renumbered) block numbers.
|
|
BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
|
|
|
|
// Likewise for BBOffsets.
|
|
BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
|
|
|
|
// Next, update WaterList. Specifically, we need to add OrigMBB as having
|
|
// available water after it (but not if it's already there, which happens
|
|
// when splitting before a conditional branch that is followed by an
|
|
// unconditional branch - in that case we want to insert NewBB).
|
|
std::vector<MachineBasicBlock*>::iterator IP =
|
|
std::lower_bound(WaterList.begin(), WaterList.end(), OrigBB,
|
|
CompareMBBNumbers);
|
|
MachineBasicBlock* WaterBB = *IP;
|
|
if (WaterBB == OrigBB)
|
|
WaterList.insert(next(IP), NewBB);
|
|
else
|
|
WaterList.insert(IP, OrigBB);
|
|
|
|
// Figure out how large the first NewMBB is. (It cannot
|
|
// contain a constpool_entry or tablejump.)
|
|
unsigned NewBBSize = 0;
|
|
for (MachineBasicBlock::iterator I = NewBB->begin(), E = NewBB->end();
|
|
I != E; ++I)
|
|
NewBBSize += ARM::GetInstSize(I);
|
|
|
|
unsigned OrigBBI = OrigBB->getNumber();
|
|
unsigned NewBBI = NewBB->getNumber();
|
|
// Set the size of NewBB in BBSizes.
|
|
BBSizes[NewBBI] = NewBBSize;
|
|
|
|
// We removed instructions from UserMBB, subtract that off from its size.
|
|
// Add 2 or 4 to the block to count the unconditional branch we added to it.
|
|
unsigned delta = isThumb ? 2 : 4;
|
|
BBSizes[OrigBBI] -= NewBBSize - delta;
|
|
|
|
// ...and adjust BBOffsets for NewBB accordingly.
|
|
BBOffsets[NewBBI] = BBOffsets[OrigBBI] + BBSizes[OrigBBI];
|
|
|
|
// All BBOffsets following these blocks must be modified.
|
|
AdjustBBOffsetsAfter(NewBB, delta);
|
|
|
|
return NewBB;
|
|
}
|
|
|
|
/// OffsetIsInRange - Checks whether UserOffset (the location of a constant pool
|
|
/// reference) is within MaxDisp of TrialOffset (a proposed location of a
|
|
/// constant pool entry).
|
|
bool ARMConstantIslands::OffsetIsInRange(unsigned UserOffset,
|
|
unsigned TrialOffset, unsigned MaxDisp, bool NegativeOK) {
|
|
// On Thumb offsets==2 mod 4 are rounded down by the hardware for
|
|
// purposes of the displacement computation; compensate for that here.
|
|
// Effectively, the valid range of displacements is 2 bytes smaller for such
|
|
// references.
|
|
if (isThumb && UserOffset%4 !=0)
|
|
UserOffset -= 2;
|
|
// CPEs will be rounded up to a multiple of 4.
|
|
if (isThumb && TrialOffset%4 != 0)
|
|
TrialOffset += 2;
|
|
|
|
if (UserOffset <= TrialOffset) {
|
|
// User before the Trial.
|
|
if (TrialOffset-UserOffset <= MaxDisp)
|
|
return true;
|
|
} else if (NegativeOK) {
|
|
if (UserOffset-TrialOffset <= MaxDisp)
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
/// WaterIsInRange - Returns true if a CPE placed after the specified
|
|
/// Water (a basic block) will be in range for the specific MI.
|
|
|
|
bool ARMConstantIslands::WaterIsInRange(unsigned UserOffset,
|
|
MachineBasicBlock* Water, unsigned MaxDisp)
|
|
{
|
|
MachineFunction::iterator I = next(MachineFunction::iterator(Water));
|
|
unsigned CPEOffset = BBOffsets[Water->getNumber()] +
|
|
BBSizes[Water->getNumber()];
|
|
|
|
// If the CPE is to be inserted before the instruction, that will raise
|
|
// the offset of the instruction. (Currently applies only to ARM, so
|
|
// no alignment compensation attempted here.)
|
|
if (CPEOffset < UserOffset)
|
|
UserOffset += 4;
|
|
|
|
return OffsetIsInRange (UserOffset, CPEOffset, MaxDisp, !isThumb);
|
|
}
|
|
|
|
/// CPEIsInRange - Returns true if the distance between specific MI and
|
|
/// specific ConstPool entry instruction can fit in MI's displacement field.
|
|
bool ARMConstantIslands::CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
|
|
MachineInstr *CPEMI,
|
|
unsigned MaxDisp, bool DoDump) {
|
|
unsigned CPEOffset = GetOffsetOf(CPEMI);
|
|
assert(CPEOffset%4 == 0 && "Misaligned CPE");
|
|
|
|
if (DoDump) {
|
|
DOUT << "User of CPE#" << CPEMI->getOperand(0).getImm()
|
|
<< " max delta=" << MaxDisp
|
|
<< " insn address=" << UserOffset
|
|
<< " CPE address=" << CPEOffset
|
|
<< " offset=" << int(CPEOffset-UserOffset) << "\t" << *MI;
|
|
}
|
|
|
|
return OffsetIsInRange(UserOffset, CPEOffset, MaxDisp, !isThumb);
|
|
}
|
|
|
|
/// BBIsJumpedOver - Return true of the specified basic block's only predecessor
|
|
/// unconditionally branches to its only successor.
|
|
static bool BBIsJumpedOver(MachineBasicBlock *MBB) {
|
|
if (MBB->pred_size() != 1 || MBB->succ_size() != 1)
|
|
return false;
|
|
|
|
MachineBasicBlock *Succ = *MBB->succ_begin();
|
|
MachineBasicBlock *Pred = *MBB->pred_begin();
|
|
MachineInstr *PredMI = &Pred->back();
|
|
if (PredMI->getOpcode() == ARM::B || PredMI->getOpcode() == ARM::tB)
|
|
return PredMI->getOperand(0).getMBB() == Succ;
|
|
return false;
|
|
}
|
|
|
|
void ARMConstantIslands::AdjustBBOffsetsAfter(MachineBasicBlock *BB,
|
|
int delta) {
|
|
MachineFunction::iterator MBBI = BB; MBBI = next(MBBI);
|
|
for(unsigned i=BB->getNumber()+1; i<BB->getParent()->getNumBlockIDs(); i++) {
|
|
BBOffsets[i] += delta;
|
|
// If some existing blocks have padding, adjust the padding as needed, a
|
|
// bit tricky. delta can be negative so don't use % on that.
|
|
if (isThumb) {
|
|
MachineBasicBlock *MBB = MBBI;
|
|
if (!MBB->empty()) {
|
|
// Constant pool entries require padding.
|
|
if (MBB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY) {
|
|
unsigned oldOffset = BBOffsets[i] - delta;
|
|
if (oldOffset%4==0 && BBOffsets[i]%4!=0) {
|
|
// add new padding
|
|
BBSizes[i] += 2;
|
|
delta += 2;
|
|
} else if (oldOffset%4!=0 && BBOffsets[i]%4==0) {
|
|
// remove existing padding
|
|
BBSizes[i] -=2;
|
|
delta -= 2;
|
|
}
|
|
}
|
|
// Thumb jump tables require padding. They can be at the end, or
|
|
// followed by an unconditional branch.
|
|
MachineInstr *ThumbJTMI = NULL;
|
|
if (prior(MBB->end())->getOpcode() == ARM::tBR_JTr)
|
|
ThumbJTMI = prior(MBB->end());
|
|
else if (prior(MBB->end()) != MBB->begin() &&
|
|
prior(prior(MBB->end()))->getOpcode() == ARM::tBR_JTr)
|
|
ThumbJTMI = prior(prior(MBB->end()));
|
|
if (ThumbJTMI) {
|
|
unsigned newMIOffset = GetOffsetOf(ThumbJTMI);
|
|
unsigned oldMIOffset = newMIOffset - delta;
|
|
if (oldMIOffset%4 == 0 && newMIOffset%4 != 0) {
|
|
// remove existing padding
|
|
BBSizes[i] -= 2;
|
|
delta -= 2;
|
|
} else if (oldMIOffset%4 != 0 && newMIOffset%4 == 0) {
|
|
// add new padding
|
|
BBSizes[i] += 2;
|
|
delta += 2;
|
|
}
|
|
}
|
|
if (delta==0)
|
|
return;
|
|
}
|
|
MBBI = next(MBBI);
|
|
}
|
|
}
|
|
}
|
|
|
|
/// DecrementOldEntry - find the constant pool entry with index CPI
|
|
/// and instruction CPEMI, and decrement its refcount. If the refcount
|
|
/// becomes 0 remove the entry and instruction. Returns true if we removed
|
|
/// the entry, false if we didn't.
|
|
|
|
bool ARMConstantIslands::DecrementOldEntry(unsigned CPI, MachineInstr *CPEMI) {
|
|
// Find the old entry. Eliminate it if it is no longer used.
|
|
CPEntry *CPE = findConstPoolEntry(CPI, CPEMI);
|
|
assert(CPE && "Unexpected!");
|
|
if (--CPE->RefCount == 0) {
|
|
RemoveDeadCPEMI(CPEMI);
|
|
CPE->CPEMI = NULL;
|
|
NumCPEs--;
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
/// LookForCPEntryInRange - see if the currently referenced CPE is in range;
|
|
/// if not, see if an in-range clone of the CPE is in range, and if so,
|
|
/// change the data structures so the user references the clone. Returns:
|
|
/// 0 = no existing entry found
|
|
/// 1 = entry found, and there were no code insertions or deletions
|
|
/// 2 = entry found, and there were code insertions or deletions
|
|
int ARMConstantIslands::LookForExistingCPEntry(CPUser& U, unsigned UserOffset)
|
|
{
|
|
MachineInstr *UserMI = U.MI;
|
|
MachineInstr *CPEMI = U.CPEMI;
|
|
|
|
// Check to see if the CPE is already in-range.
|
|
if (CPEIsInRange(UserMI, UserOffset, CPEMI, U.MaxDisp, true)) {
|
|
DOUT << "In range\n";
|
|
return 1;
|
|
}
|
|
|
|
// No. Look for previously created clones of the CPE that are in range.
|
|
unsigned CPI = CPEMI->getOperand(1).getConstantPoolIndex();
|
|
std::vector<CPEntry> &CPEs = CPEntries[CPI];
|
|
for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
|
|
// We already tried this one
|
|
if (CPEs[i].CPEMI == CPEMI)
|
|
continue;
|
|
// Removing CPEs can leave empty entries, skip
|
|
if (CPEs[i].CPEMI == NULL)
|
|
continue;
|
|
if (CPEIsInRange(UserMI, UserOffset, CPEs[i].CPEMI, U.MaxDisp, false)) {
|
|
DOUT << "Replacing CPE#" << CPI << " with CPE#" << CPEs[i].CPI << "\n";
|
|
// Point the CPUser node to the replacement
|
|
U.CPEMI = CPEs[i].CPEMI;
|
|
// Change the CPI in the instruction operand to refer to the clone.
|
|
for (unsigned j = 0, e = UserMI->getNumOperands(); j != e; ++j)
|
|
if (UserMI->getOperand(j).isConstantPoolIndex()) {
|
|
UserMI->getOperand(j).setConstantPoolIndex(CPEs[i].CPI);
|
|
break;
|
|
}
|
|
// Adjust the refcount of the clone...
|
|
CPEs[i].RefCount++;
|
|
// ...and the original. If we didn't remove the old entry, none of the
|
|
// addresses changed, so we don't need another pass.
|
|
return DecrementOldEntry(CPI, CPEMI) ? 2 : 1;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/// getUnconditionalBrDisp - Returns the maximum displacement that can fit in
|
|
/// the specific unconditional branch instruction.
|
|
static inline unsigned getUnconditionalBrDisp(int Opc) {
|
|
return (Opc == ARM::tB) ? ((1<<10)-1)*2 : ((1<<23)-1)*4;
|
|
}
|
|
|
|
/// AcceptWater - Small amount of common code factored out of the following.
|
|
|
|
MachineBasicBlock* ARMConstantIslands::AcceptWater(MachineBasicBlock *WaterBB,
|
|
std::vector<MachineBasicBlock*>::iterator IP) {
|
|
DOUT << "found water in range\n";
|
|
// Remove the original WaterList entry; we want subsequent
|
|
// insertions in this vicinity to go after the one we're
|
|
// about to insert. This considerably reduces the number
|
|
// of times we have to move the same CPE more than once.
|
|
WaterList.erase(IP);
|
|
// CPE goes before following block (NewMBB).
|
|
return next(MachineFunction::iterator(WaterBB));
|
|
}
|
|
|
|
/// LookForWater - look for an existing entry in the WaterList in which
|
|
/// we can place the CPE referenced from U so it's within range of U's MI.
|
|
/// Returns true if found, false if not. If it returns true, *NewMBB
|
|
/// is set to the WaterList entry.
|
|
/// For ARM, we prefer the water that's farthest away. For Thumb, prefer
|
|
/// water that will not introduce padding to water that will; within each
|
|
/// group, prefer the water that's farthest away.
|
|
|
|
bool ARMConstantIslands::LookForWater(CPUser &U, unsigned UserOffset,
|
|
MachineBasicBlock** NewMBB) {
|
|
std::vector<MachineBasicBlock*>::iterator IPThatWouldPad;
|
|
MachineBasicBlock* WaterBBThatWouldPad = NULL;
|
|
if (!WaterList.empty()) {
|
|
for (std::vector<MachineBasicBlock*>::iterator IP = prior(WaterList.end()),
|
|
B = WaterList.begin();; --IP) {
|
|
MachineBasicBlock* WaterBB = *IP;
|
|
if (WaterIsInRange(UserOffset, WaterBB, U.MaxDisp)) {
|
|
if (isThumb &&
|
|
(BBOffsets[WaterBB->getNumber()] +
|
|
BBSizes[WaterBB->getNumber()])%4 != 0) {
|
|
// This is valid Water, but would introduce padding. Remember
|
|
// it in case we don't find any Water that doesn't do this.
|
|
if (!WaterBBThatWouldPad) {
|
|
WaterBBThatWouldPad = WaterBB;
|
|
IPThatWouldPad = IP;
|
|
}
|
|
} else {
|
|
*NewMBB = AcceptWater(WaterBB, IP);
|
|
return true;
|
|
}
|
|
}
|
|
if (IP == B)
|
|
break;
|
|
}
|
|
}
|
|
if (isThumb && WaterBBThatWouldPad) {
|
|
*NewMBB = AcceptWater(WaterBBThatWouldPad, IPThatWouldPad);
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
/// CreateNewWater - No existing WaterList entry will work for
|
|
/// CPUsers[CPUserIndex], so create a place to put the CPE. The end of the
|
|
/// block is used if in range, and the conditional branch munged so control
|
|
/// flow is correct. Otherwise the block is split to create a hole with an
|
|
/// unconditional branch around it. In either case *NewMBB is set to a
|
|
/// block following which the new island can be inserted (the WaterList
|
|
/// is not adjusted).
|
|
|
|
void ARMConstantIslands::CreateNewWater(unsigned CPUserIndex,
|
|
unsigned UserOffset, MachineBasicBlock** NewMBB) {
|
|
CPUser &U = CPUsers[CPUserIndex];
|
|
MachineInstr *UserMI = U.MI;
|
|
MachineInstr *CPEMI = U.CPEMI;
|
|
MachineBasicBlock *UserMBB = UserMI->getParent();
|
|
unsigned OffsetOfNextBlock = BBOffsets[UserMBB->getNumber()] +
|
|
BBSizes[UserMBB->getNumber()];
|
|
assert(OffsetOfNextBlock== BBOffsets[UserMBB->getNumber()+1]);
|
|
|
|
// If the use is at the end of the block, or the end of the block
|
|
// is within range, make new water there. (The addition below is
|
|
// for the unconditional branch we will be adding: 4 bytes on ARM,
|
|
// 2 on Thumb. Possible Thumb alignment padding is allowed for
|
|
// inside OffsetIsInRange.
|
|
// If the block ends in an unconditional branch already, it is water,
|
|
// and is known to be out of range, so we'll always be adding a branch.)
|
|
if (&UserMBB->back() == UserMI ||
|
|
OffsetIsInRange(UserOffset, OffsetOfNextBlock + (isThumb ? 2: 4),
|
|
U.MaxDisp, !isThumb)) {
|
|
DOUT << "Split at end of block\n";
|
|
if (&UserMBB->back() == UserMI)
|
|
assert(BBHasFallthrough(UserMBB) && "Expected a fallthrough BB!");
|
|
*NewMBB = next(MachineFunction::iterator(UserMBB));
|
|
// Add an unconditional branch from UserMBB to fallthrough block.
|
|
// Record it for branch lengthening; this new branch will not get out of
|
|
// range, but if the preceding conditional branch is out of range, the
|
|
// targets will be exchanged, and the altered branch may be out of
|
|
// range, so the machinery has to know about it.
|
|
int UncondBr = isThumb ? ARM::tB : ARM::B;
|
|
BuildMI(UserMBB, TII->get(UncondBr)).addMBB(*NewMBB);
|
|
unsigned MaxDisp = getUnconditionalBrDisp(UncondBr);
|
|
ImmBranches.push_back(ImmBranch(&UserMBB->back(),
|
|
MaxDisp, false, UncondBr));
|
|
int delta = isThumb ? 2 : 4;
|
|
BBSizes[UserMBB->getNumber()] += delta;
|
|
AdjustBBOffsetsAfter(UserMBB, delta);
|
|
} else {
|
|
// What a big block. Find a place within the block to split it.
|
|
// This is a little tricky on Thumb since instructions are 2 bytes
|
|
// and constant pool entries are 4 bytes: if instruction I references
|
|
// island CPE, and instruction I+1 references CPE', it will
|
|
// not work well to put CPE as far forward as possible, since then
|
|
// CPE' cannot immediately follow it (that location is 2 bytes
|
|
// farther away from I+1 than CPE was from I) and we'd need to create
|
|
// a new island. So, we make a first guess, then walk through the
|
|
// instructions between the one currently being looked at and the
|
|
// possible insertion point, and make sure any other instructions
|
|
// that reference CPEs will be able to use the same island area;
|
|
// if not, we back up the insertion point.
|
|
|
|
// The 4 in the following is for the unconditional branch we'll be
|
|
// inserting (allows for long branch on Thumb). Alignment of the
|
|
// island is handled inside OffsetIsInRange.
|
|
unsigned BaseInsertOffset = UserOffset + U.MaxDisp -4;
|
|
// This could point off the end of the block if we've already got
|
|
// constant pool entries following this block; only the last one is
|
|
// in the water list. Back past any possible branches (allow for a
|
|
// conditional and a maximally long unconditional).
|
|
if (BaseInsertOffset >= BBOffsets[UserMBB->getNumber()+1])
|
|
BaseInsertOffset = BBOffsets[UserMBB->getNumber()+1] -
|
|
(isThumb ? 6 : 8);
|
|
unsigned EndInsertOffset = BaseInsertOffset +
|
|
CPEMI->getOperand(2).getImm();
|
|
MachineBasicBlock::iterator MI = UserMI;
|
|
++MI;
|
|
unsigned CPUIndex = CPUserIndex+1;
|
|
for (unsigned Offset = UserOffset+ARM::GetInstSize(UserMI);
|
|
Offset < BaseInsertOffset;
|
|
Offset += ARM::GetInstSize(MI),
|
|
MI = next(MI)) {
|
|
if (CPUIndex < CPUsers.size() && CPUsers[CPUIndex].MI == MI) {
|
|
if (!OffsetIsInRange(Offset, EndInsertOffset,
|
|
CPUsers[CPUIndex].MaxDisp, !isThumb)) {
|
|
BaseInsertOffset -= (isThumb ? 2 : 4);
|
|
EndInsertOffset -= (isThumb ? 2 : 4);
|
|
}
|
|
// This is overly conservative, as we don't account for CPEMIs
|
|
// being reused within the block, but it doesn't matter much.
|
|
EndInsertOffset += CPUsers[CPUIndex].CPEMI->getOperand(2).getImm();
|
|
CPUIndex++;
|
|
}
|
|
}
|
|
DOUT << "Split in middle of big block\n";
|
|
*NewMBB = SplitBlockBeforeInstr(prior(MI));
|
|
}
|
|
}
|
|
|
|
/// HandleConstantPoolUser - Analyze the specified user, checking to see if it
|
|
/// is out-of-range. If so, pick it up the constant pool value and move it some
|
|
/// place in-range. Return true if we changed any addresses (thus must run
|
|
/// another pass of branch lengthening), false otherwise.
|
|
bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn,
|
|
unsigned CPUserIndex){
|
|
CPUser &U = CPUsers[CPUserIndex];
|
|
MachineInstr *UserMI = U.MI;
|
|
MachineInstr *CPEMI = U.CPEMI;
|
|
unsigned CPI = CPEMI->getOperand(1).getConstantPoolIndex();
|
|
unsigned Size = CPEMI->getOperand(2).getImm();
|
|
MachineBasicBlock *NewMBB;
|
|
// Compute this only once, it's expensive. The 4 or 8 is the value the
|
|
// hardware keeps in the PC (2 insns ahead of the reference).
|
|
unsigned UserOffset = GetOffsetOf(UserMI) + (isThumb ? 4 : 8);
|
|
|
|
// Special case: tLEApcrel are two instructions MI's. The actual user is the
|
|
// second instruction.
|
|
if (UserMI->getOpcode() == ARM::tLEApcrel)
|
|
UserOffset += 2;
|
|
|
|
// See if the current entry is within range, or there is a clone of it
|
|
// in range.
|
|
int result = LookForExistingCPEntry(U, UserOffset);
|
|
if (result==1) return false;
|
|
else if (result==2) return true;
|
|
|
|
// No existing clone of this CPE is within range.
|
|
// We will be generating a new clone. Get a UID for it.
|
|
unsigned ID = NextUID++;
|
|
|
|
// Look for water where we can place this CPE. We look for the farthest one
|
|
// away that will work. Forward references only for now (although later
|
|
// we might find some that are backwards).
|
|
|
|
if (!LookForWater(U, UserOffset, &NewMBB)) {
|
|
// No water found.
|
|
DOUT << "No water found\n";
|
|
CreateNewWater(CPUserIndex, UserOffset, &NewMBB);
|
|
}
|
|
|
|
// Okay, we know we can put an island before NewMBB now, do it!
|
|
MachineBasicBlock *NewIsland = new MachineBasicBlock();
|
|
Fn.getBasicBlockList().insert(NewMBB, NewIsland);
|
|
|
|
// Update internal data structures to account for the newly inserted MBB.
|
|
UpdateForInsertedWaterBlock(NewIsland);
|
|
|
|
// Decrement the old entry, and remove it if refcount becomes 0.
|
|
DecrementOldEntry(CPI, CPEMI);
|
|
|
|
// Now that we have an island to add the CPE to, clone the original CPE and
|
|
// add it to the island.
|
|
U.CPEMI = BuildMI(NewIsland, TII->get(ARM::CONSTPOOL_ENTRY))
|
|
.addImm(ID).addConstantPoolIndex(CPI).addImm(Size);
|
|
CPEntries[CPI].push_back(CPEntry(U.CPEMI, ID, 1));
|
|
NumCPEs++;
|
|
|
|
BBOffsets[NewIsland->getNumber()] = BBOffsets[NewMBB->getNumber()];
|
|
// Compensate for .align 2 in thumb mode.
|
|
if (isThumb && BBOffsets[NewIsland->getNumber()]%4 != 0)
|
|
Size += 2;
|
|
// Increase the size of the island block to account for the new entry.
|
|
BBSizes[NewIsland->getNumber()] += Size;
|
|
AdjustBBOffsetsAfter(NewIsland, Size);
|
|
|
|
// Finally, change the CPI in the instruction operand to be ID.
|
|
for (unsigned i = 0, e = UserMI->getNumOperands(); i != e; ++i)
|
|
if (UserMI->getOperand(i).isConstantPoolIndex()) {
|
|
UserMI->getOperand(i).setConstantPoolIndex(ID);
|
|
break;
|
|
}
|
|
|
|
DOUT << " Moved CPE to #" << ID << " CPI=" << CPI << "\t" << *UserMI;
|
|
|
|
return true;
|
|
}
|
|
|
|
/// RemoveDeadCPEMI - Remove a dead constant pool entry instruction. Update
|
|
/// sizes and offsets of impacted basic blocks.
|
|
void ARMConstantIslands::RemoveDeadCPEMI(MachineInstr *CPEMI) {
|
|
MachineBasicBlock *CPEBB = CPEMI->getParent();
|
|
unsigned Size = CPEMI->getOperand(2).getImm();
|
|
CPEMI->eraseFromParent();
|
|
BBSizes[CPEBB->getNumber()] -= Size;
|
|
// All succeeding offsets have the current size value added in, fix this.
|
|
if (CPEBB->empty()) {
|
|
// In thumb mode, the size of island may be padded by two to compensate for
|
|
// the alignment requirement. Then it will now be 2 when the block is
|
|
// empty, so fix this.
|
|
// All succeeding offsets have the current size value added in, fix this.
|
|
if (BBSizes[CPEBB->getNumber()] != 0) {
|
|
Size += BBSizes[CPEBB->getNumber()];
|
|
BBSizes[CPEBB->getNumber()] = 0;
|
|
}
|
|
}
|
|
AdjustBBOffsetsAfter(CPEBB, -Size);
|
|
// An island has only one predecessor BB and one successor BB. Check if
|
|
// this BB's predecessor jumps directly to this BB's successor. This
|
|
// shouldn't happen currently.
|
|
assert(!BBIsJumpedOver(CPEBB) && "How did this happen?");
|
|
// FIXME: remove the empty blocks after all the work is done?
|
|
}
|
|
|
|
/// RemoveUnusedCPEntries - Remove constant pool entries whose refcounts
|
|
/// are zero.
|
|
bool ARMConstantIslands::RemoveUnusedCPEntries() {
|
|
unsigned MadeChange = false;
|
|
for (unsigned i = 0, e = CPEntries.size(); i != e; ++i) {
|
|
std::vector<CPEntry> &CPEs = CPEntries[i];
|
|
for (unsigned j = 0, ee = CPEs.size(); j != ee; ++j) {
|
|
if (CPEs[j].RefCount == 0 && CPEs[j].CPEMI) {
|
|
RemoveDeadCPEMI(CPEs[j].CPEMI);
|
|
CPEs[j].CPEMI = NULL;
|
|
MadeChange = true;
|
|
}
|
|
}
|
|
}
|
|
return MadeChange;
|
|
}
|
|
|
|
/// BBIsInRange - Returns true if the distance between specific MI and
|
|
/// specific BB can fit in MI's displacement field.
|
|
bool ARMConstantIslands::BBIsInRange(MachineInstr *MI,MachineBasicBlock *DestBB,
|
|
unsigned MaxDisp) {
|
|
unsigned PCAdj = isThumb ? 4 : 8;
|
|
unsigned BrOffset = GetOffsetOf(MI) + PCAdj;
|
|
unsigned DestOffset = BBOffsets[DestBB->getNumber()];
|
|
|
|
DOUT << "Branch of destination BB#" << DestBB->getNumber()
|
|
<< " from BB#" << MI->getParent()->getNumber()
|
|
<< " max delta=" << MaxDisp
|
|
<< " from " << GetOffsetOf(MI) << " to " << DestOffset
|
|
<< " offset " << int(DestOffset-BrOffset) << "\t" << *MI;
|
|
|
|
if (BrOffset <= DestOffset) {
|
|
// Branch before the Dest.
|
|
if (DestOffset-BrOffset <= MaxDisp)
|
|
return true;
|
|
} else {
|
|
if (BrOffset-DestOffset <= MaxDisp)
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
/// FixUpImmediateBr - Fix up an immediate branch whose destination is too far
|
|
/// away to fit in its displacement field.
|
|
bool ARMConstantIslands::FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br) {
|
|
MachineInstr *MI = Br.MI;
|
|
MachineBasicBlock *DestBB = MI->getOperand(0).getMachineBasicBlock();
|
|
|
|
// Check to see if the DestBB is already in-range.
|
|
if (BBIsInRange(MI, DestBB, Br.MaxDisp))
|
|
return false;
|
|
|
|
if (!Br.isCond)
|
|
return FixUpUnconditionalBr(Fn, Br);
|
|
return FixUpConditionalBr(Fn, Br);
|
|
}
|
|
|
|
/// FixUpUnconditionalBr - Fix up an unconditional branch whose destination is
|
|
/// too far away to fit in its displacement field. If the LR register has been
|
|
/// spilled in the epilogue, then we can use BL to implement a far jump.
|
|
/// Otherwise, add an intermediate branch instruction to to a branch.
|
|
bool
|
|
ARMConstantIslands::FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br) {
|
|
MachineInstr *MI = Br.MI;
|
|
MachineBasicBlock *MBB = MI->getParent();
|
|
assert(isThumb && "Expected a Thumb function!");
|
|
|
|
// Use BL to implement far jump.
|
|
Br.MaxDisp = (1 << 21) * 2;
|
|
MI->setInstrDescriptor(TII->get(ARM::tBfar));
|
|
BBSizes[MBB->getNumber()] += 2;
|
|
AdjustBBOffsetsAfter(MBB, 2);
|
|
HasFarJump = true;
|
|
NumUBrFixed++;
|
|
|
|
DOUT << " Changed B to long jump " << *MI;
|
|
|
|
return true;
|
|
}
|
|
|
|
/// FixUpConditionalBr - Fix up a conditional branch whose destination is too
|
|
/// far away to fit in its displacement field. It is converted to an inverse
|
|
/// conditional branch + an unconditional branch to the destination.
|
|
bool
|
|
ARMConstantIslands::FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br) {
|
|
MachineInstr *MI = Br.MI;
|
|
MachineBasicBlock *DestBB = MI->getOperand(0).getMachineBasicBlock();
|
|
|
|
// Add a unconditional branch to the destination and invert the branch
|
|
// condition to jump over it:
|
|
// blt L1
|
|
// =>
|
|
// bge L2
|
|
// b L1
|
|
// L2:
|
|
ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(1).getImmedValue();
|
|
CC = ARMCC::getOppositeCondition(CC);
|
|
|
|
// If the branch is at the end of its MBB and that has a fall-through block,
|
|
// direct the updated conditional branch to the fall-through block. Otherwise,
|
|
// split the MBB before the next instruction.
|
|
MachineBasicBlock *MBB = MI->getParent();
|
|
MachineInstr *BMI = &MBB->back();
|
|
bool NeedSplit = (BMI != MI) || !BBHasFallthrough(MBB);
|
|
|
|
NumCBrFixed++;
|
|
if (BMI != MI) {
|
|
if (next(MachineBasicBlock::iterator(MI)) == MBB->back() &&
|
|
BMI->getOpcode() == Br.UncondBr) {
|
|
// Last MI in the BB is a unconditional branch. Can we simply invert the
|
|
// condition and swap destinations:
|
|
// beq L1
|
|
// b L2
|
|
// =>
|
|
// bne L2
|
|
// b L1
|
|
MachineBasicBlock *NewDest = BMI->getOperand(0).getMachineBasicBlock();
|
|
if (BBIsInRange(MI, NewDest, Br.MaxDisp)) {
|
|
DOUT << " Invert Bcc condition and swap its destination with " << *BMI;
|
|
BMI->getOperand(0).setMachineBasicBlock(DestBB);
|
|
MI->getOperand(0).setMachineBasicBlock(NewDest);
|
|
MI->getOperand(1).setImm(CC);
|
|
return true;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (NeedSplit) {
|
|
SplitBlockBeforeInstr(MI);
|
|
// No need for the branch to the next block. We're adding a unconditional
|
|
// branch to the destination.
|
|
int delta = ARM::GetInstSize(&MBB->back());
|
|
BBSizes[MBB->getNumber()] -= delta;
|
|
MachineBasicBlock* SplitBB = next(MachineFunction::iterator(MBB));
|
|
AdjustBBOffsetsAfter(SplitBB, -delta);
|
|
MBB->back().eraseFromParent();
|
|
// BBOffsets[SplitBB] is wrong temporarily, fixed below
|
|
}
|
|
MachineBasicBlock *NextBB = next(MachineFunction::iterator(MBB));
|
|
|
|
DOUT << " Insert B to BB#" << DestBB->getNumber()
|
|
<< " also invert condition and change dest. to BB#"
|
|
<< NextBB->getNumber() << "\n";
|
|
|
|
// Insert a new conditional branch and a new unconditional branch.
|
|
// Also update the ImmBranch as well as adding a new entry for the new branch.
|
|
BuildMI(MBB, TII->get(MI->getOpcode())).addMBB(NextBB).addImm(CC);
|
|
Br.MI = &MBB->back();
|
|
BBSizes[MBB->getNumber()] += ARM::GetInstSize(&MBB->back());
|
|
BuildMI(MBB, TII->get(Br.UncondBr)).addMBB(DestBB);
|
|
BBSizes[MBB->getNumber()] += ARM::GetInstSize(&MBB->back());
|
|
unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr);
|
|
ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr));
|
|
|
|
// Remove the old conditional branch. It may or may not still be in MBB.
|
|
BBSizes[MI->getParent()->getNumber()] -= ARM::GetInstSize(MI);
|
|
MI->eraseFromParent();
|
|
|
|
// The net size change is an addition of one unconditional branch.
|
|
int delta = ARM::GetInstSize(&MBB->back());
|
|
AdjustBBOffsetsAfter(MBB, delta);
|
|
return true;
|
|
}
|
|
|
|
/// UndoLRSpillRestore - Remove Thumb push / pop instructions that only spills
|
|
/// LR / restores LR to pc.
|
|
bool ARMConstantIslands::UndoLRSpillRestore() {
|
|
bool MadeChange = false;
|
|
for (unsigned i = 0, e = PushPopMIs.size(); i != e; ++i) {
|
|
MachineInstr *MI = PushPopMIs[i];
|
|
if (MI->getOpcode() == ARM::tPOP_RET &&
|
|
MI->getOperand(0).getReg() == ARM::PC &&
|
|
MI->getNumExplicitOperands() == 1) {
|
|
BuildMI(MI->getParent(), TII->get(ARM::tBX_RET));
|
|
MI->eraseFromParent();
|
|
MadeChange = true;
|
|
}
|
|
}
|
|
return MadeChange;
|
|
}
|