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https://github.com/c64scene-ar/llvm-6502.git
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1b279144ec
utils/sort_includes.py. I clearly haven't done this in a while, so more changed than usual. This even uncovered a missing include from the InstrProf library that I've added. No functionality changed here, just mechanical cleanup of the include order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225974 91177308-0d34-0410-b5e6-96231b3b80d8
94 lines
2.9 KiB
C++
94 lines
2.9 KiB
C++
//===-- MipsAsmBackend.h - Mips Asm Backend ------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the MipsAsmBackend class.
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//
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//===----------------------------------------------------------------------===//
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//
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#ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H
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#define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H
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#include "MCTargetDesc/MipsFixupKinds.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/MC/MCAsmBackend.h"
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namespace llvm {
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class MCAssembler;
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struct MCFixupKindInfo;
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class Target;
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class MCObjectWriter;
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class MipsAsmBackend : public MCAsmBackend {
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Triple::OSType OSType;
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bool IsLittle; // Big or little endian
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bool Is64Bit; // 32 or 64 bit words
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public:
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MipsAsmBackend(const Target &T, Triple::OSType _OSType, bool _isLittle,
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bool _is64Bit)
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: MCAsmBackend(), OSType(_OSType), IsLittle(_isLittle),
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Is64Bit(_is64Bit) {}
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const override;
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void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
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uint64_t Value, bool IsPCRel) const override;
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const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
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unsigned getNumFixupKinds() const override {
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return Mips::NumTargetFixupKinds;
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}
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/// @name Target Relaxation Interfaces
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/// @{
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/// MayNeedRelaxation - Check whether the given instruction may need
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/// relaxation.
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///
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/// \param Inst - The instruction to test.
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bool mayNeedRelaxation(const MCInst &Inst) const override {
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return false;
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}
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/// fixupNeedsRelaxation - Target specific predicate for whether a given
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/// fixup requires the associated instruction to be relaxed.
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bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
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const MCRelaxableFragment *DF,
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const MCAsmLayout &Layout) const override {
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// FIXME.
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llvm_unreachable("RelaxInstruction() unimplemented");
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return false;
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}
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/// RelaxInstruction - Relax the instruction in the given fragment
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/// to the next wider instruction.
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///
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/// \param Inst - The instruction to relax, which may be the same
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/// as the output.
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/// \param [out] Res On return, the relaxed instruction.
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void relaxInstruction(const MCInst &Inst, MCInst &Res) const override {}
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/// @}
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bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override;
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void processFixupValue(const MCAssembler &Asm, const MCAsmLayout &Layout,
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const MCFixup &Fixup, const MCFragment *DF,
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const MCValue &Target, uint64_t &Value,
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bool &IsResolved) override;
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}; // class MipsAsmBackend
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} // namespace
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#endif
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