mirror of
https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158234 91177308-0d34-0410-b5e6-96231b3b80d8
1586 lines
56 KiB
C++
1586 lines
56 KiB
C++
//===-- IfConversion.cpp - Machine code if conversion pass. ---------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the machine instruction level if-conversion pass.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "ifcvt"
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#include "BranchFolding.h"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/MC/MCInstrItineraries.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/STLExtras.h"
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using namespace llvm;
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// Hidden options for help debugging.
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static cl::opt<int> IfCvtFnStart("ifcvt-fn-start", cl::init(-1), cl::Hidden);
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static cl::opt<int> IfCvtFnStop("ifcvt-fn-stop", cl::init(-1), cl::Hidden);
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static cl::opt<int> IfCvtLimit("ifcvt-limit", cl::init(-1), cl::Hidden);
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static cl::opt<bool> DisableSimple("disable-ifcvt-simple",
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cl::init(false), cl::Hidden);
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static cl::opt<bool> DisableSimpleF("disable-ifcvt-simple-false",
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cl::init(false), cl::Hidden);
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static cl::opt<bool> DisableTriangle("disable-ifcvt-triangle",
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cl::init(false), cl::Hidden);
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static cl::opt<bool> DisableTriangleR("disable-ifcvt-triangle-rev",
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cl::init(false), cl::Hidden);
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static cl::opt<bool> DisableTriangleF("disable-ifcvt-triangle-false",
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cl::init(false), cl::Hidden);
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static cl::opt<bool> DisableTriangleFR("disable-ifcvt-triangle-false-rev",
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cl::init(false), cl::Hidden);
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static cl::opt<bool> DisableDiamond("disable-ifcvt-diamond",
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cl::init(false), cl::Hidden);
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static cl::opt<bool> IfCvtBranchFold("ifcvt-branch-fold",
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cl::init(true), cl::Hidden);
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STATISTIC(NumSimple, "Number of simple if-conversions performed");
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STATISTIC(NumSimpleFalse, "Number of simple (F) if-conversions performed");
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STATISTIC(NumTriangle, "Number of triangle if-conversions performed");
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STATISTIC(NumTriangleRev, "Number of triangle (R) if-conversions performed");
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STATISTIC(NumTriangleFalse,"Number of triangle (F) if-conversions performed");
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STATISTIC(NumTriangleFRev, "Number of triangle (F/R) if-conversions performed");
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STATISTIC(NumDiamonds, "Number of diamond if-conversions performed");
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STATISTIC(NumIfConvBBs, "Number of if-converted blocks");
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STATISTIC(NumDupBBs, "Number of duplicated blocks");
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STATISTIC(NumUnpred, "Number of true blocks of diamonds unpredicated");
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namespace {
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class IfConverter : public MachineFunctionPass {
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enum IfcvtKind {
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ICNotClassfied, // BB data valid, but not classified.
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ICSimpleFalse, // Same as ICSimple, but on the false path.
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ICSimple, // BB is entry of an one split, no rejoin sub-CFG.
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ICTriangleFRev, // Same as ICTriangleFalse, but false path rev condition.
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ICTriangleRev, // Same as ICTriangle, but true path rev condition.
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ICTriangleFalse, // Same as ICTriangle, but on the false path.
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ICTriangle, // BB is entry of a triangle sub-CFG.
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ICDiamond // BB is entry of a diamond sub-CFG.
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};
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/// BBInfo - One per MachineBasicBlock, this is used to cache the result
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/// if-conversion feasibility analysis. This includes results from
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/// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
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/// classification, and common tail block of its successors (if it's a
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/// diamond shape), its size, whether it's predicable, and whether any
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/// instruction can clobber the 'would-be' predicate.
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///
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/// IsDone - True if BB is not to be considered for ifcvt.
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/// IsBeingAnalyzed - True if BB is currently being analyzed.
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/// IsAnalyzed - True if BB has been analyzed (info is still valid).
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/// IsEnqueued - True if BB has been enqueued to be ifcvt'ed.
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/// IsBrAnalyzable - True if AnalyzeBranch() returns false.
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/// HasFallThrough - True if BB may fallthrough to the following BB.
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/// IsUnpredicable - True if BB is known to be unpredicable.
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/// ClobbersPred - True if BB could modify predicates (e.g. has
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/// cmp, call, etc.)
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/// NonPredSize - Number of non-predicated instructions.
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/// ExtraCost - Extra cost for multi-cycle instructions.
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/// ExtraCost2 - Some instructions are slower when predicated
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/// BB - Corresponding MachineBasicBlock.
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/// TrueBB / FalseBB- See AnalyzeBranch().
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/// BrCond - Conditions for end of block conditional branches.
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/// Predicate - Predicate used in the BB.
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struct BBInfo {
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bool IsDone : 1;
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bool IsBeingAnalyzed : 1;
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bool IsAnalyzed : 1;
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bool IsEnqueued : 1;
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bool IsBrAnalyzable : 1;
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bool HasFallThrough : 1;
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bool IsUnpredicable : 1;
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bool CannotBeCopied : 1;
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bool ClobbersPred : 1;
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unsigned NonPredSize;
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unsigned ExtraCost;
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unsigned ExtraCost2;
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MachineBasicBlock *BB;
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MachineBasicBlock *TrueBB;
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MachineBasicBlock *FalseBB;
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SmallVector<MachineOperand, 4> BrCond;
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SmallVector<MachineOperand, 4> Predicate;
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BBInfo() : IsDone(false), IsBeingAnalyzed(false),
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IsAnalyzed(false), IsEnqueued(false), IsBrAnalyzable(false),
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HasFallThrough(false), IsUnpredicable(false),
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CannotBeCopied(false), ClobbersPred(false), NonPredSize(0),
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ExtraCost(0), ExtraCost2(0), BB(0), TrueBB(0), FalseBB(0) {}
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};
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/// IfcvtToken - Record information about pending if-conversions to attempt:
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/// BBI - Corresponding BBInfo.
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/// Kind - Type of block. See IfcvtKind.
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/// NeedSubsumption - True if the to-be-predicated BB has already been
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/// predicated.
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/// NumDups - Number of instructions that would be duplicated due
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/// to this if-conversion. (For diamonds, the number of
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/// identical instructions at the beginnings of both
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/// paths).
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/// NumDups2 - For diamonds, the number of identical instructions
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/// at the ends of both paths.
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struct IfcvtToken {
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BBInfo &BBI;
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IfcvtKind Kind;
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bool NeedSubsumption;
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unsigned NumDups;
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unsigned NumDups2;
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IfcvtToken(BBInfo &b, IfcvtKind k, bool s, unsigned d, unsigned d2 = 0)
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: BBI(b), Kind(k), NeedSubsumption(s), NumDups(d), NumDups2(d2) {}
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};
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/// BBAnalysis - Results of if-conversion feasibility analysis indexed by
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/// basic block number.
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std::vector<BBInfo> BBAnalysis;
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const TargetLowering *TLI;
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const TargetInstrInfo *TII;
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const TargetRegisterInfo *TRI;
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const InstrItineraryData *InstrItins;
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const MachineBranchProbabilityInfo *MBPI;
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MachineRegisterInfo *MRI;
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bool PreRegAlloc;
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bool MadeChange;
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int FnNum;
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public:
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static char ID;
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IfConverter() : MachineFunctionPass(ID), FnNum(-1) {
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initializeIfConverterPass(*PassRegistry::getPassRegistry());
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<MachineBranchProbabilityInfo>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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virtual bool runOnMachineFunction(MachineFunction &MF);
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private:
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bool ReverseBranchCondition(BBInfo &BBI);
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bool ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
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const BranchProbability &Prediction) const;
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bool ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
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bool FalseBranch, unsigned &Dups,
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const BranchProbability &Prediction) const;
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bool ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
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unsigned &Dups1, unsigned &Dups2) const;
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void ScanInstructions(BBInfo &BBI);
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BBInfo &AnalyzeBlock(MachineBasicBlock *BB,
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std::vector<IfcvtToken*> &Tokens);
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bool FeasibilityAnalysis(BBInfo &BBI, SmallVectorImpl<MachineOperand> &Cond,
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bool isTriangle = false, bool RevBranch = false);
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void AnalyzeBlocks(MachineFunction &MF, std::vector<IfcvtToken*> &Tokens);
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void InvalidatePreds(MachineBasicBlock *BB);
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void RemoveExtraEdges(BBInfo &BBI);
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bool IfConvertSimple(BBInfo &BBI, IfcvtKind Kind);
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bool IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind);
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bool IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
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unsigned NumDups1, unsigned NumDups2);
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void PredicateBlock(BBInfo &BBI,
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MachineBasicBlock::iterator E,
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SmallVectorImpl<MachineOperand> &Cond,
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SmallSet<unsigned, 4> &Redefs,
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SmallSet<unsigned, 4> *LaterRedefs = 0);
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void CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
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SmallVectorImpl<MachineOperand> &Cond,
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SmallSet<unsigned, 4> &Redefs,
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bool IgnoreBr = false);
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void MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges = true);
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bool MeetIfcvtSizeLimit(MachineBasicBlock &BB,
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unsigned Cycle, unsigned Extra,
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const BranchProbability &Prediction) const {
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return Cycle > 0 && TII->isProfitableToIfCvt(BB, Cycle, Extra,
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Prediction);
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}
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bool MeetIfcvtSizeLimit(MachineBasicBlock &TBB,
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unsigned TCycle, unsigned TExtra,
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MachineBasicBlock &FBB,
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unsigned FCycle, unsigned FExtra,
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const BranchProbability &Prediction) const {
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return TCycle > 0 && FCycle > 0 &&
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TII->isProfitableToIfCvt(TBB, TCycle, TExtra, FBB, FCycle, FExtra,
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Prediction);
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}
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// blockAlwaysFallThrough - Block ends without a terminator.
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bool blockAlwaysFallThrough(BBInfo &BBI) const {
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return BBI.IsBrAnalyzable && BBI.TrueBB == NULL;
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}
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// IfcvtTokenCmp - Used to sort if-conversion candidates.
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static bool IfcvtTokenCmp(IfcvtToken *C1, IfcvtToken *C2) {
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int Incr1 = (C1->Kind == ICDiamond)
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? -(int)(C1->NumDups + C1->NumDups2) : (int)C1->NumDups;
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int Incr2 = (C2->Kind == ICDiamond)
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? -(int)(C2->NumDups + C2->NumDups2) : (int)C2->NumDups;
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if (Incr1 > Incr2)
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return true;
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else if (Incr1 == Incr2) {
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// Favors subsumption.
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if (C1->NeedSubsumption == false && C2->NeedSubsumption == true)
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return true;
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else if (C1->NeedSubsumption == C2->NeedSubsumption) {
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// Favors diamond over triangle, etc.
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if ((unsigned)C1->Kind < (unsigned)C2->Kind)
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return true;
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else if (C1->Kind == C2->Kind)
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return C1->BBI.BB->getNumber() < C2->BBI.BB->getNumber();
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}
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}
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return false;
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}
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};
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char IfConverter::ID = 0;
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}
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char &llvm::IfConverterID = IfConverter::ID;
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INITIALIZE_PASS_BEGIN(IfConverter, "if-converter", "If Converter", false, false)
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INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
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INITIALIZE_PASS_END(IfConverter, "if-converter", "If Converter", false, false)
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bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
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TLI = MF.getTarget().getTargetLowering();
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TII = MF.getTarget().getInstrInfo();
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TRI = MF.getTarget().getRegisterInfo();
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MBPI = &getAnalysis<MachineBranchProbabilityInfo>();
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MRI = &MF.getRegInfo();
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InstrItins = MF.getTarget().getInstrItineraryData();
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if (!TII) return false;
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PreRegAlloc = MRI->isSSA();
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bool BFChange = false;
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if (!PreRegAlloc) {
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// Tail merge tend to expose more if-conversion opportunities.
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BranchFolder BF(true, false);
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BFChange = BF.OptimizeFunction(MF, TII,
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MF.getTarget().getRegisterInfo(),
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getAnalysisIfAvailable<MachineModuleInfo>());
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}
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DEBUG(dbgs() << "\nIfcvt: function (" << ++FnNum << ") \'"
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<< MF.getFunction()->getName() << "\'");
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if (FnNum < IfCvtFnStart || (IfCvtFnStop != -1 && FnNum > IfCvtFnStop)) {
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DEBUG(dbgs() << " skipped\n");
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return false;
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}
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DEBUG(dbgs() << "\n");
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MF.RenumberBlocks();
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BBAnalysis.resize(MF.getNumBlockIDs());
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std::vector<IfcvtToken*> Tokens;
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MadeChange = false;
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unsigned NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle +
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NumTriangleRev + NumTriangleFalse + NumTriangleFRev + NumDiamonds;
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while (IfCvtLimit == -1 || (int)NumIfCvts < IfCvtLimit) {
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// Do an initial analysis for each basic block and find all the potential
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// candidates to perform if-conversion.
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bool Change = false;
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AnalyzeBlocks(MF, Tokens);
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while (!Tokens.empty()) {
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IfcvtToken *Token = Tokens.back();
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Tokens.pop_back();
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BBInfo &BBI = Token->BBI;
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IfcvtKind Kind = Token->Kind;
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unsigned NumDups = Token->NumDups;
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unsigned NumDups2 = Token->NumDups2;
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delete Token;
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// If the block has been evicted out of the queue or it has already been
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// marked dead (due to it being predicated), then skip it.
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if (BBI.IsDone)
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BBI.IsEnqueued = false;
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if (!BBI.IsEnqueued)
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continue;
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BBI.IsEnqueued = false;
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bool RetVal = false;
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switch (Kind) {
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default: llvm_unreachable("Unexpected!");
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case ICSimple:
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case ICSimpleFalse: {
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bool isFalse = Kind == ICSimpleFalse;
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if ((isFalse && DisableSimpleF) || (!isFalse && DisableSimple)) break;
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DEBUG(dbgs() << "Ifcvt (Simple" << (Kind == ICSimpleFalse ?
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" false" : "")
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<< "): BB#" << BBI.BB->getNumber() << " ("
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<< ((Kind == ICSimpleFalse)
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? BBI.FalseBB->getNumber()
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: BBI.TrueBB->getNumber()) << ") ");
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RetVal = IfConvertSimple(BBI, Kind);
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DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
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if (RetVal) {
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if (isFalse) ++NumSimpleFalse;
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else ++NumSimple;
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}
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break;
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}
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case ICTriangle:
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case ICTriangleRev:
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case ICTriangleFalse:
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case ICTriangleFRev: {
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bool isFalse = Kind == ICTriangleFalse;
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bool isRev = (Kind == ICTriangleRev || Kind == ICTriangleFRev);
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if (DisableTriangle && !isFalse && !isRev) break;
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if (DisableTriangleR && !isFalse && isRev) break;
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if (DisableTriangleF && isFalse && !isRev) break;
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if (DisableTriangleFR && isFalse && isRev) break;
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DEBUG(dbgs() << "Ifcvt (Triangle");
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if (isFalse)
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DEBUG(dbgs() << " false");
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if (isRev)
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DEBUG(dbgs() << " rev");
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DEBUG(dbgs() << "): BB#" << BBI.BB->getNumber() << " (T:"
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<< BBI.TrueBB->getNumber() << ",F:"
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<< BBI.FalseBB->getNumber() << ") ");
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RetVal = IfConvertTriangle(BBI, Kind);
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DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
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if (RetVal) {
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if (isFalse) {
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if (isRev) ++NumTriangleFRev;
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else ++NumTriangleFalse;
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} else {
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if (isRev) ++NumTriangleRev;
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else ++NumTriangle;
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}
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}
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break;
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}
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case ICDiamond: {
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if (DisableDiamond) break;
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DEBUG(dbgs() << "Ifcvt (Diamond): BB#" << BBI.BB->getNumber() << " (T:"
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<< BBI.TrueBB->getNumber() << ",F:"
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<< BBI.FalseBB->getNumber() << ") ");
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RetVal = IfConvertDiamond(BBI, Kind, NumDups, NumDups2);
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DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
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if (RetVal) ++NumDiamonds;
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break;
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}
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}
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Change |= RetVal;
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NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle + NumTriangleRev +
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NumTriangleFalse + NumTriangleFRev + NumDiamonds;
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if (IfCvtLimit != -1 && (int)NumIfCvts >= IfCvtLimit)
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break;
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}
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if (!Change)
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break;
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MadeChange |= Change;
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}
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// Delete tokens in case of early exit.
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while (!Tokens.empty()) {
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IfcvtToken *Token = Tokens.back();
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Tokens.pop_back();
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delete Token;
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}
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Tokens.clear();
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BBAnalysis.clear();
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if (MadeChange && IfCvtBranchFold) {
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BranchFolder BF(false, false);
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BF.OptimizeFunction(MF, TII,
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MF.getTarget().getRegisterInfo(),
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getAnalysisIfAvailable<MachineModuleInfo>());
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}
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MadeChange |= BFChange;
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return MadeChange;
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}
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/// findFalseBlock - BB has a fallthrough. Find its 'false' successor given
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/// its 'true' successor.
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static MachineBasicBlock *findFalseBlock(MachineBasicBlock *BB,
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MachineBasicBlock *TrueBB) {
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for (MachineBasicBlock::succ_iterator SI = BB->succ_begin(),
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E = BB->succ_end(); SI != E; ++SI) {
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MachineBasicBlock *SuccBB = *SI;
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if (SuccBB != TrueBB)
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return SuccBB;
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}
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return NULL;
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}
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/// ReverseBranchCondition - Reverse the condition of the end of the block
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/// branch. Swap block's 'true' and 'false' successors.
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bool IfConverter::ReverseBranchCondition(BBInfo &BBI) {
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DebugLoc dl; // FIXME: this is nowhere
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if (!TII->ReverseBranchCondition(BBI.BrCond)) {
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TII->RemoveBranch(*BBI.BB);
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|
TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
|
|
std::swap(BBI.TrueBB, BBI.FalseBB);
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
/// getNextBlock - Returns the next block in the function blocks ordering. If
|
|
/// it is the end, returns NULL.
|
|
static inline MachineBasicBlock *getNextBlock(MachineBasicBlock *BB) {
|
|
MachineFunction::iterator I = BB;
|
|
MachineFunction::iterator E = BB->getParent()->end();
|
|
if (++I == E)
|
|
return NULL;
|
|
return I;
|
|
}
|
|
|
|
/// ValidSimple - Returns true if the 'true' block (along with its
|
|
/// predecessor) forms a valid simple shape for ifcvt. It also returns the
|
|
/// number of instructions that the ifcvt would need to duplicate if performed
|
|
/// in Dups.
|
|
bool IfConverter::ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
|
|
const BranchProbability &Prediction) const {
|
|
Dups = 0;
|
|
if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
|
|
return false;
|
|
|
|
if (TrueBBI.IsBrAnalyzable)
|
|
return false;
|
|
|
|
if (TrueBBI.BB->pred_size() > 1) {
|
|
if (TrueBBI.CannotBeCopied ||
|
|
!TII->isProfitableToDupForIfCvt(*TrueBBI.BB, TrueBBI.NonPredSize,
|
|
Prediction))
|
|
return false;
|
|
Dups = TrueBBI.NonPredSize;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
/// ValidTriangle - Returns true if the 'true' and 'false' blocks (along
|
|
/// with their common predecessor) forms a valid triangle shape for ifcvt.
|
|
/// If 'FalseBranch' is true, it checks if 'true' block's false branch
|
|
/// branches to the 'false' block rather than the other way around. It also
|
|
/// returns the number of instructions that the ifcvt would need to duplicate
|
|
/// if performed in 'Dups'.
|
|
bool IfConverter::ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
|
|
bool FalseBranch, unsigned &Dups,
|
|
const BranchProbability &Prediction) const {
|
|
Dups = 0;
|
|
if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
|
|
return false;
|
|
|
|
if (TrueBBI.BB->pred_size() > 1) {
|
|
if (TrueBBI.CannotBeCopied)
|
|
return false;
|
|
|
|
unsigned Size = TrueBBI.NonPredSize;
|
|
if (TrueBBI.IsBrAnalyzable) {
|
|
if (TrueBBI.TrueBB && TrueBBI.BrCond.empty())
|
|
// Ends with an unconditional branch. It will be removed.
|
|
--Size;
|
|
else {
|
|
MachineBasicBlock *FExit = FalseBranch
|
|
? TrueBBI.TrueBB : TrueBBI.FalseBB;
|
|
if (FExit)
|
|
// Require a conditional branch
|
|
++Size;
|
|
}
|
|
}
|
|
if (!TII->isProfitableToDupForIfCvt(*TrueBBI.BB, Size, Prediction))
|
|
return false;
|
|
Dups = Size;
|
|
}
|
|
|
|
MachineBasicBlock *TExit = FalseBranch ? TrueBBI.FalseBB : TrueBBI.TrueBB;
|
|
if (!TExit && blockAlwaysFallThrough(TrueBBI)) {
|
|
MachineFunction::iterator I = TrueBBI.BB;
|
|
if (++I == TrueBBI.BB->getParent()->end())
|
|
return false;
|
|
TExit = I;
|
|
}
|
|
return TExit && TExit == FalseBBI.BB;
|
|
}
|
|
|
|
/// ValidDiamond - Returns true if the 'true' and 'false' blocks (along
|
|
/// with their common predecessor) forms a valid diamond shape for ifcvt.
|
|
bool IfConverter::ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
|
|
unsigned &Dups1, unsigned &Dups2) const {
|
|
Dups1 = Dups2 = 0;
|
|
if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone ||
|
|
FalseBBI.IsBeingAnalyzed || FalseBBI.IsDone)
|
|
return false;
|
|
|
|
MachineBasicBlock *TT = TrueBBI.TrueBB;
|
|
MachineBasicBlock *FT = FalseBBI.TrueBB;
|
|
|
|
if (!TT && blockAlwaysFallThrough(TrueBBI))
|
|
TT = getNextBlock(TrueBBI.BB);
|
|
if (!FT && blockAlwaysFallThrough(FalseBBI))
|
|
FT = getNextBlock(FalseBBI.BB);
|
|
if (TT != FT)
|
|
return false;
|
|
if (TT == NULL && (TrueBBI.IsBrAnalyzable || FalseBBI.IsBrAnalyzable))
|
|
return false;
|
|
if (TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1)
|
|
return false;
|
|
|
|
// FIXME: Allow true block to have an early exit?
|
|
if (TrueBBI.FalseBB || FalseBBI.FalseBB ||
|
|
(TrueBBI.ClobbersPred && FalseBBI.ClobbersPred))
|
|
return false;
|
|
|
|
// Count duplicate instructions at the beginning of the true and false blocks.
|
|
MachineBasicBlock::iterator TIB = TrueBBI.BB->begin();
|
|
MachineBasicBlock::iterator FIB = FalseBBI.BB->begin();
|
|
MachineBasicBlock::iterator TIE = TrueBBI.BB->end();
|
|
MachineBasicBlock::iterator FIE = FalseBBI.BB->end();
|
|
while (TIB != TIE && FIB != FIE) {
|
|
// Skip dbg_value instructions. These do not count.
|
|
if (TIB->isDebugValue()) {
|
|
while (TIB != TIE && TIB->isDebugValue())
|
|
++TIB;
|
|
if (TIB == TIE)
|
|
break;
|
|
}
|
|
if (FIB->isDebugValue()) {
|
|
while (FIB != FIE && FIB->isDebugValue())
|
|
++FIB;
|
|
if (FIB == FIE)
|
|
break;
|
|
}
|
|
if (!TIB->isIdenticalTo(FIB))
|
|
break;
|
|
++Dups1;
|
|
++TIB;
|
|
++FIB;
|
|
}
|
|
|
|
// Now, in preparation for counting duplicate instructions at the ends of the
|
|
// blocks, move the end iterators up past any branch instructions.
|
|
while (TIE != TIB) {
|
|
--TIE;
|
|
if (!TIE->isBranch())
|
|
break;
|
|
}
|
|
while (FIE != FIB) {
|
|
--FIE;
|
|
if (!FIE->isBranch())
|
|
break;
|
|
}
|
|
|
|
// If Dups1 includes all of a block, then don't count duplicate
|
|
// instructions at the end of the blocks.
|
|
if (TIB == TIE || FIB == FIE)
|
|
return true;
|
|
|
|
// Count duplicate instructions at the ends of the blocks.
|
|
while (TIE != TIB && FIE != FIB) {
|
|
// Skip dbg_value instructions. These do not count.
|
|
if (TIE->isDebugValue()) {
|
|
while (TIE != TIB && TIE->isDebugValue())
|
|
--TIE;
|
|
if (TIE == TIB)
|
|
break;
|
|
}
|
|
if (FIE->isDebugValue()) {
|
|
while (FIE != FIB && FIE->isDebugValue())
|
|
--FIE;
|
|
if (FIE == FIB)
|
|
break;
|
|
}
|
|
if (!TIE->isIdenticalTo(FIE))
|
|
break;
|
|
++Dups2;
|
|
--TIE;
|
|
--FIE;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
/// ScanInstructions - Scan all the instructions in the block to determine if
|
|
/// the block is predicable. In most cases, that means all the instructions
|
|
/// in the block are isPredicable(). Also checks if the block contains any
|
|
/// instruction which can clobber a predicate (e.g. condition code register).
|
|
/// If so, the block is not predicable unless it's the last instruction.
|
|
void IfConverter::ScanInstructions(BBInfo &BBI) {
|
|
if (BBI.IsDone)
|
|
return;
|
|
|
|
bool AlreadyPredicated = !BBI.Predicate.empty();
|
|
// First analyze the end of BB branches.
|
|
BBI.TrueBB = BBI.FalseBB = NULL;
|
|
BBI.BrCond.clear();
|
|
BBI.IsBrAnalyzable =
|
|
!TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
|
|
BBI.HasFallThrough = BBI.IsBrAnalyzable && BBI.FalseBB == NULL;
|
|
|
|
if (BBI.BrCond.size()) {
|
|
// No false branch. This BB must end with a conditional branch and a
|
|
// fallthrough.
|
|
if (!BBI.FalseBB)
|
|
BBI.FalseBB = findFalseBlock(BBI.BB, BBI.TrueBB);
|
|
if (!BBI.FalseBB) {
|
|
// Malformed bcc? True and false blocks are the same?
|
|
BBI.IsUnpredicable = true;
|
|
return;
|
|
}
|
|
}
|
|
|
|
// Then scan all the instructions.
|
|
BBI.NonPredSize = 0;
|
|
BBI.ExtraCost = 0;
|
|
BBI.ExtraCost2 = 0;
|
|
BBI.ClobbersPred = false;
|
|
for (MachineBasicBlock::iterator I = BBI.BB->begin(), E = BBI.BB->end();
|
|
I != E; ++I) {
|
|
if (I->isDebugValue())
|
|
continue;
|
|
|
|
if (I->isNotDuplicable())
|
|
BBI.CannotBeCopied = true;
|
|
|
|
bool isPredicated = TII->isPredicated(I);
|
|
bool isCondBr = BBI.IsBrAnalyzable && I->isConditionalBranch();
|
|
|
|
if (!isCondBr) {
|
|
if (!isPredicated) {
|
|
BBI.NonPredSize++;
|
|
unsigned ExtraPredCost = 0;
|
|
unsigned NumCycles = TII->getInstrLatency(InstrItins, &*I,
|
|
&ExtraPredCost);
|
|
if (NumCycles > 1)
|
|
BBI.ExtraCost += NumCycles-1;
|
|
BBI.ExtraCost2 += ExtraPredCost;
|
|
} else if (!AlreadyPredicated) {
|
|
// FIXME: This instruction is already predicated before the
|
|
// if-conversion pass. It's probably something like a conditional move.
|
|
// Mark this block unpredicable for now.
|
|
BBI.IsUnpredicable = true;
|
|
return;
|
|
}
|
|
}
|
|
|
|
if (BBI.ClobbersPred && !isPredicated) {
|
|
// Predicate modification instruction should end the block (except for
|
|
// already predicated instructions and end of block branches).
|
|
if (isCondBr) {
|
|
// A conditional branch is not predicable, but it may be eliminated.
|
|
continue;
|
|
}
|
|
|
|
// Predicate may have been modified, the subsequent (currently)
|
|
// unpredicated instructions cannot be correctly predicated.
|
|
BBI.IsUnpredicable = true;
|
|
return;
|
|
}
|
|
|
|
// FIXME: Make use of PredDefs? e.g. ADDC, SUBC sets predicates but are
|
|
// still potentially predicable.
|
|
std::vector<MachineOperand> PredDefs;
|
|
if (TII->DefinesPredicate(I, PredDefs))
|
|
BBI.ClobbersPred = true;
|
|
|
|
if (!TII->isPredicable(I)) {
|
|
BBI.IsUnpredicable = true;
|
|
return;
|
|
}
|
|
}
|
|
}
|
|
|
|
/// FeasibilityAnalysis - Determine if the block is a suitable candidate to be
|
|
/// predicated by the specified predicate.
|
|
bool IfConverter::FeasibilityAnalysis(BBInfo &BBI,
|
|
SmallVectorImpl<MachineOperand> &Pred,
|
|
bool isTriangle, bool RevBranch) {
|
|
// If the block is dead or unpredicable, then it cannot be predicated.
|
|
if (BBI.IsDone || BBI.IsUnpredicable)
|
|
return false;
|
|
|
|
// If it is already predicated, check if its predicate subsumes the new
|
|
// predicate.
|
|
if (BBI.Predicate.size() && !TII->SubsumesPredicate(BBI.Predicate, Pred))
|
|
return false;
|
|
|
|
if (BBI.BrCond.size()) {
|
|
if (!isTriangle)
|
|
return false;
|
|
|
|
// Test predicate subsumption.
|
|
SmallVector<MachineOperand, 4> RevPred(Pred.begin(), Pred.end());
|
|
SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
|
|
if (RevBranch) {
|
|
if (TII->ReverseBranchCondition(Cond))
|
|
return false;
|
|
}
|
|
if (TII->ReverseBranchCondition(RevPred) ||
|
|
!TII->SubsumesPredicate(Cond, RevPred))
|
|
return false;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
/// AnalyzeBlock - Analyze the structure of the sub-CFG starting from
|
|
/// the specified block. Record its successors and whether it looks like an
|
|
/// if-conversion candidate.
|
|
IfConverter::BBInfo &IfConverter::AnalyzeBlock(MachineBasicBlock *BB,
|
|
std::vector<IfcvtToken*> &Tokens) {
|
|
BBInfo &BBI = BBAnalysis[BB->getNumber()];
|
|
|
|
if (BBI.IsAnalyzed || BBI.IsBeingAnalyzed)
|
|
return BBI;
|
|
|
|
BBI.BB = BB;
|
|
BBI.IsBeingAnalyzed = true;
|
|
|
|
ScanInstructions(BBI);
|
|
|
|
// Unanalyzable or ends with fallthrough or unconditional branch, or if is not
|
|
// considered for ifcvt anymore.
|
|
if (!BBI.IsBrAnalyzable || BBI.BrCond.empty() || BBI.IsDone) {
|
|
BBI.IsBeingAnalyzed = false;
|
|
BBI.IsAnalyzed = true;
|
|
return BBI;
|
|
}
|
|
|
|
// Do not ifcvt if either path is a back edge to the entry block.
|
|
if (BBI.TrueBB == BB || BBI.FalseBB == BB) {
|
|
BBI.IsBeingAnalyzed = false;
|
|
BBI.IsAnalyzed = true;
|
|
return BBI;
|
|
}
|
|
|
|
// Do not ifcvt if true and false fallthrough blocks are the same.
|
|
if (!BBI.FalseBB) {
|
|
BBI.IsBeingAnalyzed = false;
|
|
BBI.IsAnalyzed = true;
|
|
return BBI;
|
|
}
|
|
|
|
BBInfo &TrueBBI = AnalyzeBlock(BBI.TrueBB, Tokens);
|
|
BBInfo &FalseBBI = AnalyzeBlock(BBI.FalseBB, Tokens);
|
|
|
|
if (TrueBBI.IsDone && FalseBBI.IsDone) {
|
|
BBI.IsBeingAnalyzed = false;
|
|
BBI.IsAnalyzed = true;
|
|
return BBI;
|
|
}
|
|
|
|
SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
|
|
bool CanRevCond = !TII->ReverseBranchCondition(RevCond);
|
|
|
|
unsigned Dups = 0;
|
|
unsigned Dups2 = 0;
|
|
bool TNeedSub = !TrueBBI.Predicate.empty();
|
|
bool FNeedSub = !FalseBBI.Predicate.empty();
|
|
bool Enqueued = false;
|
|
|
|
BranchProbability Prediction = MBPI->getEdgeProbability(BB, TrueBBI.BB);
|
|
|
|
if (CanRevCond && ValidDiamond(TrueBBI, FalseBBI, Dups, Dups2) &&
|
|
MeetIfcvtSizeLimit(*TrueBBI.BB, (TrueBBI.NonPredSize - (Dups + Dups2) +
|
|
TrueBBI.ExtraCost), TrueBBI.ExtraCost2,
|
|
*FalseBBI.BB, (FalseBBI.NonPredSize - (Dups + Dups2) +
|
|
FalseBBI.ExtraCost),FalseBBI.ExtraCost2,
|
|
Prediction) &&
|
|
FeasibilityAnalysis(TrueBBI, BBI.BrCond) &&
|
|
FeasibilityAnalysis(FalseBBI, RevCond)) {
|
|
// Diamond:
|
|
// EBB
|
|
// / \_
|
|
// | |
|
|
// TBB FBB
|
|
// \ /
|
|
// TailBB
|
|
// Note TailBB can be empty.
|
|
Tokens.push_back(new IfcvtToken(BBI, ICDiamond, TNeedSub|FNeedSub, Dups,
|
|
Dups2));
|
|
Enqueued = true;
|
|
}
|
|
|
|
if (ValidTriangle(TrueBBI, FalseBBI, false, Dups, Prediction) &&
|
|
MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
|
|
TrueBBI.ExtraCost2, Prediction) &&
|
|
FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) {
|
|
// Triangle:
|
|
// EBB
|
|
// | \_
|
|
// | |
|
|
// | TBB
|
|
// | /
|
|
// FBB
|
|
Tokens.push_back(new IfcvtToken(BBI, ICTriangle, TNeedSub, Dups));
|
|
Enqueued = true;
|
|
}
|
|
|
|
if (ValidTriangle(TrueBBI, FalseBBI, true, Dups, Prediction) &&
|
|
MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
|
|
TrueBBI.ExtraCost2, Prediction) &&
|
|
FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) {
|
|
Tokens.push_back(new IfcvtToken(BBI, ICTriangleRev, TNeedSub, Dups));
|
|
Enqueued = true;
|
|
}
|
|
|
|
if (ValidSimple(TrueBBI, Dups, Prediction) &&
|
|
MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
|
|
TrueBBI.ExtraCost2, Prediction) &&
|
|
FeasibilityAnalysis(TrueBBI, BBI.BrCond)) {
|
|
// Simple (split, no rejoin):
|
|
// EBB
|
|
// | \_
|
|
// | |
|
|
// | TBB---> exit
|
|
// |
|
|
// FBB
|
|
Tokens.push_back(new IfcvtToken(BBI, ICSimple, TNeedSub, Dups));
|
|
Enqueued = true;
|
|
}
|
|
|
|
if (CanRevCond) {
|
|
// Try the other path...
|
|
if (ValidTriangle(FalseBBI, TrueBBI, false, Dups,
|
|
Prediction.getCompl()) &&
|
|
MeetIfcvtSizeLimit(*FalseBBI.BB,
|
|
FalseBBI.NonPredSize + FalseBBI.ExtraCost,
|
|
FalseBBI.ExtraCost2, Prediction.getCompl()) &&
|
|
FeasibilityAnalysis(FalseBBI, RevCond, true)) {
|
|
Tokens.push_back(new IfcvtToken(BBI, ICTriangleFalse, FNeedSub, Dups));
|
|
Enqueued = true;
|
|
}
|
|
|
|
if (ValidTriangle(FalseBBI, TrueBBI, true, Dups,
|
|
Prediction.getCompl()) &&
|
|
MeetIfcvtSizeLimit(*FalseBBI.BB,
|
|
FalseBBI.NonPredSize + FalseBBI.ExtraCost,
|
|
FalseBBI.ExtraCost2, Prediction.getCompl()) &&
|
|
FeasibilityAnalysis(FalseBBI, RevCond, true, true)) {
|
|
Tokens.push_back(new IfcvtToken(BBI, ICTriangleFRev, FNeedSub, Dups));
|
|
Enqueued = true;
|
|
}
|
|
|
|
if (ValidSimple(FalseBBI, Dups, Prediction.getCompl()) &&
|
|
MeetIfcvtSizeLimit(*FalseBBI.BB,
|
|
FalseBBI.NonPredSize + FalseBBI.ExtraCost,
|
|
FalseBBI.ExtraCost2, Prediction.getCompl()) &&
|
|
FeasibilityAnalysis(FalseBBI, RevCond)) {
|
|
Tokens.push_back(new IfcvtToken(BBI, ICSimpleFalse, FNeedSub, Dups));
|
|
Enqueued = true;
|
|
}
|
|
}
|
|
|
|
BBI.IsEnqueued = Enqueued;
|
|
BBI.IsBeingAnalyzed = false;
|
|
BBI.IsAnalyzed = true;
|
|
return BBI;
|
|
}
|
|
|
|
/// AnalyzeBlocks - Analyze all blocks and find entries for all if-conversion
|
|
/// candidates.
|
|
void IfConverter::AnalyzeBlocks(MachineFunction &MF,
|
|
std::vector<IfcvtToken*> &Tokens) {
|
|
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
|
|
MachineBasicBlock *BB = I;
|
|
AnalyzeBlock(BB, Tokens);
|
|
}
|
|
|
|
// Sort to favor more complex ifcvt scheme.
|
|
std::stable_sort(Tokens.begin(), Tokens.end(), IfcvtTokenCmp);
|
|
}
|
|
|
|
/// canFallThroughTo - Returns true either if ToBB is the next block after BB or
|
|
/// that all the intervening blocks are empty (given BB can fall through to its
|
|
/// next block).
|
|
static bool canFallThroughTo(MachineBasicBlock *BB, MachineBasicBlock *ToBB) {
|
|
MachineFunction::iterator PI = BB;
|
|
MachineFunction::iterator I = llvm::next(PI);
|
|
MachineFunction::iterator TI = ToBB;
|
|
MachineFunction::iterator E = BB->getParent()->end();
|
|
while (I != TI) {
|
|
// Check isSuccessor to avoid case where the next block is empty, but
|
|
// it's not a successor.
|
|
if (I == E || !I->empty() || !PI->isSuccessor(I))
|
|
return false;
|
|
PI = I++;
|
|
}
|
|
return true;
|
|
}
|
|
|
|
/// InvalidatePreds - Invalidate predecessor BB info so it would be re-analyzed
|
|
/// to determine if it can be if-converted. If predecessor is already enqueued,
|
|
/// dequeue it!
|
|
void IfConverter::InvalidatePreds(MachineBasicBlock *BB) {
|
|
for (MachineBasicBlock::pred_iterator PI = BB->pred_begin(),
|
|
E = BB->pred_end(); PI != E; ++PI) {
|
|
BBInfo &PBBI = BBAnalysis[(*PI)->getNumber()];
|
|
if (PBBI.IsDone || PBBI.BB == BB)
|
|
continue;
|
|
PBBI.IsAnalyzed = false;
|
|
PBBI.IsEnqueued = false;
|
|
}
|
|
}
|
|
|
|
/// InsertUncondBranch - Inserts an unconditional branch from BB to ToBB.
|
|
///
|
|
static void InsertUncondBranch(MachineBasicBlock *BB, MachineBasicBlock *ToBB,
|
|
const TargetInstrInfo *TII) {
|
|
DebugLoc dl; // FIXME: this is nowhere
|
|
SmallVector<MachineOperand, 0> NoCond;
|
|
TII->InsertBranch(*BB, ToBB, NULL, NoCond, dl);
|
|
}
|
|
|
|
/// RemoveExtraEdges - Remove true / false edges if either / both are no longer
|
|
/// successors.
|
|
void IfConverter::RemoveExtraEdges(BBInfo &BBI) {
|
|
MachineBasicBlock *TBB = NULL, *FBB = NULL;
|
|
SmallVector<MachineOperand, 4> Cond;
|
|
if (!TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond))
|
|
BBI.BB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
|
|
}
|
|
|
|
/// InitPredRedefs / UpdatePredRedefs - Defs by predicated instructions are
|
|
/// modeled as read + write (sort like two-address instructions). These
|
|
/// routines track register liveness and add implicit uses to if-converted
|
|
/// instructions to conform to the model.
|
|
static void InitPredRedefs(MachineBasicBlock *BB, SmallSet<unsigned,4> &Redefs,
|
|
const TargetRegisterInfo *TRI) {
|
|
for (MachineBasicBlock::livein_iterator I = BB->livein_begin(),
|
|
E = BB->livein_end(); I != E; ++I) {
|
|
unsigned Reg = *I;
|
|
Redefs.insert(Reg);
|
|
for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
|
|
Redefs.insert(*SubRegs);
|
|
}
|
|
}
|
|
|
|
static void UpdatePredRedefs(MachineInstr *MI, SmallSet<unsigned,4> &Redefs,
|
|
const TargetRegisterInfo *TRI,
|
|
bool AddImpUse = false) {
|
|
SmallVector<unsigned, 4> Defs;
|
|
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
|
|
const MachineOperand &MO = MI->getOperand(i);
|
|
if (!MO.isReg())
|
|
continue;
|
|
unsigned Reg = MO.getReg();
|
|
if (!Reg)
|
|
continue;
|
|
if (MO.isDef())
|
|
Defs.push_back(Reg);
|
|
else if (MO.isKill()) {
|
|
Redefs.erase(Reg);
|
|
for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
|
|
Redefs.erase(*SubRegs);
|
|
}
|
|
}
|
|
for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
|
|
unsigned Reg = Defs[i];
|
|
if (Redefs.count(Reg)) {
|
|
if (AddImpUse)
|
|
// Treat predicated update as read + write.
|
|
MI->addOperand(MachineOperand::CreateReg(Reg, false/*IsDef*/,
|
|
true/*IsImp*/,false/*IsKill*/,
|
|
false/*IsDead*/,true/*IsUndef*/));
|
|
} else {
|
|
Redefs.insert(Reg);
|
|
for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
|
|
Redefs.insert(*SubRegs);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void UpdatePredRedefs(MachineBasicBlock::iterator I,
|
|
MachineBasicBlock::iterator E,
|
|
SmallSet<unsigned,4> &Redefs,
|
|
const TargetRegisterInfo *TRI) {
|
|
while (I != E) {
|
|
UpdatePredRedefs(I, Redefs, TRI);
|
|
++I;
|
|
}
|
|
}
|
|
|
|
/// IfConvertSimple - If convert a simple (split, no rejoin) sub-CFG.
|
|
///
|
|
bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) {
|
|
BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
|
|
BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
|
|
BBInfo *CvtBBI = &TrueBBI;
|
|
BBInfo *NextBBI = &FalseBBI;
|
|
|
|
SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
|
|
if (Kind == ICSimpleFalse)
|
|
std::swap(CvtBBI, NextBBI);
|
|
|
|
if (CvtBBI->IsDone ||
|
|
(CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) {
|
|
// Something has changed. It's no longer safe to predicate this block.
|
|
BBI.IsAnalyzed = false;
|
|
CvtBBI->IsAnalyzed = false;
|
|
return false;
|
|
}
|
|
|
|
if (Kind == ICSimpleFalse)
|
|
if (TII->ReverseBranchCondition(Cond))
|
|
llvm_unreachable("Unable to reverse branch condition!");
|
|
|
|
// Initialize liveins to the first BB. These are potentiall redefined by
|
|
// predicated instructions.
|
|
SmallSet<unsigned, 4> Redefs;
|
|
InitPredRedefs(CvtBBI->BB, Redefs, TRI);
|
|
InitPredRedefs(NextBBI->BB, Redefs, TRI);
|
|
|
|
if (CvtBBI->BB->pred_size() > 1) {
|
|
BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
|
|
// Copy instructions in the true block, predicate them, and add them to
|
|
// the entry block.
|
|
CopyAndPredicateBlock(BBI, *CvtBBI, Cond, Redefs);
|
|
} else {
|
|
PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond, Redefs);
|
|
|
|
// Merge converted block into entry block.
|
|
BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
|
|
MergeBlocks(BBI, *CvtBBI);
|
|
}
|
|
|
|
bool IterIfcvt = true;
|
|
if (!canFallThroughTo(BBI.BB, NextBBI->BB)) {
|
|
InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
|
|
BBI.HasFallThrough = false;
|
|
// Now ifcvt'd block will look like this:
|
|
// BB:
|
|
// ...
|
|
// t, f = cmp
|
|
// if t op
|
|
// b BBf
|
|
//
|
|
// We cannot further ifcvt this block because the unconditional branch
|
|
// will have to be predicated on the new condition, that will not be
|
|
// available if cmp executes.
|
|
IterIfcvt = false;
|
|
}
|
|
|
|
RemoveExtraEdges(BBI);
|
|
|
|
// Update block info. BB can be iteratively if-converted.
|
|
if (!IterIfcvt)
|
|
BBI.IsDone = true;
|
|
InvalidatePreds(BBI.BB);
|
|
CvtBBI->IsDone = true;
|
|
|
|
// FIXME: Must maintain LiveIns.
|
|
return true;
|
|
}
|
|
|
|
/// IfConvertTriangle - If convert a triangle sub-CFG.
|
|
///
|
|
bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
|
|
BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
|
|
BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
|
|
BBInfo *CvtBBI = &TrueBBI;
|
|
BBInfo *NextBBI = &FalseBBI;
|
|
DebugLoc dl; // FIXME: this is nowhere
|
|
|
|
SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
|
|
if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
|
|
std::swap(CvtBBI, NextBBI);
|
|
|
|
if (CvtBBI->IsDone ||
|
|
(CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) {
|
|
// Something has changed. It's no longer safe to predicate this block.
|
|
BBI.IsAnalyzed = false;
|
|
CvtBBI->IsAnalyzed = false;
|
|
return false;
|
|
}
|
|
|
|
if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
|
|
if (TII->ReverseBranchCondition(Cond))
|
|
llvm_unreachable("Unable to reverse branch condition!");
|
|
|
|
if (Kind == ICTriangleRev || Kind == ICTriangleFRev) {
|
|
if (ReverseBranchCondition(*CvtBBI)) {
|
|
// BB has been changed, modify its predecessors (except for this
|
|
// one) so they don't get ifcvt'ed based on bad intel.
|
|
for (MachineBasicBlock::pred_iterator PI = CvtBBI->BB->pred_begin(),
|
|
E = CvtBBI->BB->pred_end(); PI != E; ++PI) {
|
|
MachineBasicBlock *PBB = *PI;
|
|
if (PBB == BBI.BB)
|
|
continue;
|
|
BBInfo &PBBI = BBAnalysis[PBB->getNumber()];
|
|
if (PBBI.IsEnqueued) {
|
|
PBBI.IsAnalyzed = false;
|
|
PBBI.IsEnqueued = false;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
// Initialize liveins to the first BB. These are potentially redefined by
|
|
// predicated instructions.
|
|
SmallSet<unsigned, 4> Redefs;
|
|
InitPredRedefs(CvtBBI->BB, Redefs, TRI);
|
|
InitPredRedefs(NextBBI->BB, Redefs, TRI);
|
|
|
|
bool HasEarlyExit = CvtBBI->FalseBB != NULL;
|
|
if (CvtBBI->BB->pred_size() > 1) {
|
|
BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
|
|
// Copy instructions in the true block, predicate them, and add them to
|
|
// the entry block.
|
|
CopyAndPredicateBlock(BBI, *CvtBBI, Cond, Redefs, true);
|
|
} else {
|
|
// Predicate the 'true' block after removing its branch.
|
|
CvtBBI->NonPredSize -= TII->RemoveBranch(*CvtBBI->BB);
|
|
PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond, Redefs);
|
|
|
|
// Now merge the entry of the triangle with the true block.
|
|
BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
|
|
MergeBlocks(BBI, *CvtBBI, false);
|
|
}
|
|
|
|
// If 'true' block has a 'false' successor, add an exit branch to it.
|
|
if (HasEarlyExit) {
|
|
SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(),
|
|
CvtBBI->BrCond.end());
|
|
if (TII->ReverseBranchCondition(RevCond))
|
|
llvm_unreachable("Unable to reverse branch condition!");
|
|
TII->InsertBranch(*BBI.BB, CvtBBI->FalseBB, NULL, RevCond, dl);
|
|
BBI.BB->addSuccessor(CvtBBI->FalseBB);
|
|
}
|
|
|
|
// Merge in the 'false' block if the 'false' block has no other
|
|
// predecessors. Otherwise, add an unconditional branch to 'false'.
|
|
bool FalseBBDead = false;
|
|
bool IterIfcvt = true;
|
|
bool isFallThrough = canFallThroughTo(BBI.BB, NextBBI->BB);
|
|
if (!isFallThrough) {
|
|
// Only merge them if the true block does not fallthrough to the false
|
|
// block. By not merging them, we make it possible to iteratively
|
|
// ifcvt the blocks.
|
|
if (!HasEarlyExit &&
|
|
NextBBI->BB->pred_size() == 1 && !NextBBI->HasFallThrough) {
|
|
MergeBlocks(BBI, *NextBBI);
|
|
FalseBBDead = true;
|
|
} else {
|
|
InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
|
|
BBI.HasFallThrough = false;
|
|
}
|
|
// Mixed predicated and unpredicated code. This cannot be iteratively
|
|
// predicated.
|
|
IterIfcvt = false;
|
|
}
|
|
|
|
RemoveExtraEdges(BBI);
|
|
|
|
// Update block info. BB can be iteratively if-converted.
|
|
if (!IterIfcvt)
|
|
BBI.IsDone = true;
|
|
InvalidatePreds(BBI.BB);
|
|
CvtBBI->IsDone = true;
|
|
if (FalseBBDead)
|
|
NextBBI->IsDone = true;
|
|
|
|
// FIXME: Must maintain LiveIns.
|
|
return true;
|
|
}
|
|
|
|
/// IfConvertDiamond - If convert a diamond sub-CFG.
|
|
///
|
|
bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
|
|
unsigned NumDups1, unsigned NumDups2) {
|
|
BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
|
|
BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
|
|
MachineBasicBlock *TailBB = TrueBBI.TrueBB;
|
|
// True block must fall through or end with an unanalyzable terminator.
|
|
if (!TailBB) {
|
|
if (blockAlwaysFallThrough(TrueBBI))
|
|
TailBB = FalseBBI.TrueBB;
|
|
assert((TailBB || !TrueBBI.IsBrAnalyzable) && "Unexpected!");
|
|
}
|
|
|
|
if (TrueBBI.IsDone || FalseBBI.IsDone ||
|
|
TrueBBI.BB->pred_size() > 1 ||
|
|
FalseBBI.BB->pred_size() > 1) {
|
|
// Something has changed. It's no longer safe to predicate these blocks.
|
|
BBI.IsAnalyzed = false;
|
|
TrueBBI.IsAnalyzed = false;
|
|
FalseBBI.IsAnalyzed = false;
|
|
return false;
|
|
}
|
|
|
|
// Put the predicated instructions from the 'true' block before the
|
|
// instructions from the 'false' block, unless the true block would clobber
|
|
// the predicate, in which case, do the opposite.
|
|
BBInfo *BBI1 = &TrueBBI;
|
|
BBInfo *BBI2 = &FalseBBI;
|
|
SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
|
|
if (TII->ReverseBranchCondition(RevCond))
|
|
llvm_unreachable("Unable to reverse branch condition!");
|
|
SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond;
|
|
SmallVector<MachineOperand, 4> *Cond2 = &RevCond;
|
|
|
|
// Figure out the more profitable ordering.
|
|
bool DoSwap = false;
|
|
if (TrueBBI.ClobbersPred && !FalseBBI.ClobbersPred)
|
|
DoSwap = true;
|
|
else if (TrueBBI.ClobbersPred == FalseBBI.ClobbersPred) {
|
|
if (TrueBBI.NonPredSize > FalseBBI.NonPredSize)
|
|
DoSwap = true;
|
|
}
|
|
if (DoSwap) {
|
|
std::swap(BBI1, BBI2);
|
|
std::swap(Cond1, Cond2);
|
|
}
|
|
|
|
// Remove the conditional branch from entry to the blocks.
|
|
BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
|
|
|
|
// Initialize liveins to the first BB. These are potentially redefined by
|
|
// predicated instructions.
|
|
SmallSet<unsigned, 4> Redefs;
|
|
InitPredRedefs(BBI1->BB, Redefs, TRI);
|
|
|
|
// Remove the duplicated instructions at the beginnings of both paths.
|
|
MachineBasicBlock::iterator DI1 = BBI1->BB->begin();
|
|
MachineBasicBlock::iterator DI2 = BBI2->BB->begin();
|
|
MachineBasicBlock::iterator DIE1 = BBI1->BB->end();
|
|
MachineBasicBlock::iterator DIE2 = BBI2->BB->end();
|
|
// Skip dbg_value instructions
|
|
while (DI1 != DIE1 && DI1->isDebugValue())
|
|
++DI1;
|
|
while (DI2 != DIE2 && DI2->isDebugValue())
|
|
++DI2;
|
|
BBI1->NonPredSize -= NumDups1;
|
|
BBI2->NonPredSize -= NumDups1;
|
|
|
|
// Skip past the dups on each side separately since there may be
|
|
// differing dbg_value entries.
|
|
for (unsigned i = 0; i < NumDups1; ++DI1) {
|
|
if (!DI1->isDebugValue())
|
|
++i;
|
|
}
|
|
while (NumDups1 != 0) {
|
|
++DI2;
|
|
if (!DI2->isDebugValue())
|
|
--NumDups1;
|
|
}
|
|
|
|
UpdatePredRedefs(BBI1->BB->begin(), DI1, Redefs, TRI);
|
|
BBI.BB->splice(BBI.BB->end(), BBI1->BB, BBI1->BB->begin(), DI1);
|
|
BBI2->BB->erase(BBI2->BB->begin(), DI2);
|
|
|
|
// Remove branch from 'true' block and remove duplicated instructions.
|
|
BBI1->NonPredSize -= TII->RemoveBranch(*BBI1->BB);
|
|
DI1 = BBI1->BB->end();
|
|
for (unsigned i = 0; i != NumDups2; ) {
|
|
// NumDups2 only counted non-dbg_value instructions, so this won't
|
|
// run off the head of the list.
|
|
assert (DI1 != BBI1->BB->begin());
|
|
--DI1;
|
|
// skip dbg_value instructions
|
|
if (!DI1->isDebugValue())
|
|
++i;
|
|
}
|
|
BBI1->BB->erase(DI1, BBI1->BB->end());
|
|
|
|
// Remove 'false' block branch and find the last instruction to predicate.
|
|
BBI2->NonPredSize -= TII->RemoveBranch(*BBI2->BB);
|
|
DI2 = BBI2->BB->end();
|
|
while (NumDups2 != 0) {
|
|
// NumDups2 only counted non-dbg_value instructions, so this won't
|
|
// run off the head of the list.
|
|
assert (DI2 != BBI2->BB->begin());
|
|
--DI2;
|
|
// skip dbg_value instructions
|
|
if (!DI2->isDebugValue())
|
|
--NumDups2;
|
|
}
|
|
|
|
// Remember which registers would later be defined by the false block.
|
|
// This allows us not to predicate instructions in the true block that would
|
|
// later be re-defined. That is, rather than
|
|
// subeq r0, r1, #1
|
|
// addne r0, r1, #1
|
|
// generate:
|
|
// sub r0, r1, #1
|
|
// addne r0, r1, #1
|
|
SmallSet<unsigned, 4> RedefsByFalse;
|
|
SmallSet<unsigned, 4> ExtUses;
|
|
if (TII->isProfitableToUnpredicate(*BBI1->BB, *BBI2->BB)) {
|
|
for (MachineBasicBlock::iterator FI = BBI2->BB->begin(); FI != DI2; ++FI) {
|
|
if (FI->isDebugValue())
|
|
continue;
|
|
SmallVector<unsigned, 4> Defs;
|
|
for (unsigned i = 0, e = FI->getNumOperands(); i != e; ++i) {
|
|
const MachineOperand &MO = FI->getOperand(i);
|
|
if (!MO.isReg())
|
|
continue;
|
|
unsigned Reg = MO.getReg();
|
|
if (!Reg)
|
|
continue;
|
|
if (MO.isDef()) {
|
|
Defs.push_back(Reg);
|
|
} else if (!RedefsByFalse.count(Reg)) {
|
|
// These are defined before ctrl flow reach the 'false' instructions.
|
|
// They cannot be modified by the 'true' instructions.
|
|
ExtUses.insert(Reg);
|
|
for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
|
|
ExtUses.insert(*SubRegs);
|
|
}
|
|
}
|
|
|
|
for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
|
|
unsigned Reg = Defs[i];
|
|
if (!ExtUses.count(Reg)) {
|
|
RedefsByFalse.insert(Reg);
|
|
for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
|
|
RedefsByFalse.insert(*SubRegs);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
// Predicate the 'true' block.
|
|
PredicateBlock(*BBI1, BBI1->BB->end(), *Cond1, Redefs, &RedefsByFalse);
|
|
|
|
// Predicate the 'false' block.
|
|
PredicateBlock(*BBI2, DI2, *Cond2, Redefs);
|
|
|
|
// Merge the true block into the entry of the diamond.
|
|
MergeBlocks(BBI, *BBI1, TailBB == 0);
|
|
MergeBlocks(BBI, *BBI2, TailBB == 0);
|
|
|
|
// If the if-converted block falls through or unconditionally branches into
|
|
// the tail block, and the tail block does not have other predecessors, then
|
|
// fold the tail block in as well. Otherwise, unless it falls through to the
|
|
// tail, add a unconditional branch to it.
|
|
if (TailBB) {
|
|
BBInfo &TailBBI = BBAnalysis[TailBB->getNumber()];
|
|
bool CanMergeTail = !TailBBI.HasFallThrough;
|
|
// There may still be a fall-through edge from BBI1 or BBI2 to TailBB;
|
|
// check if there are any other predecessors besides those.
|
|
unsigned NumPreds = TailBB->pred_size();
|
|
if (NumPreds > 1)
|
|
CanMergeTail = false;
|
|
else if (NumPreds == 1 && CanMergeTail) {
|
|
MachineBasicBlock::pred_iterator PI = TailBB->pred_begin();
|
|
if (*PI != BBI1->BB && *PI != BBI2->BB)
|
|
CanMergeTail = false;
|
|
}
|
|
if (CanMergeTail) {
|
|
MergeBlocks(BBI, TailBBI);
|
|
TailBBI.IsDone = true;
|
|
} else {
|
|
BBI.BB->addSuccessor(TailBB);
|
|
InsertUncondBranch(BBI.BB, TailBB, TII);
|
|
BBI.HasFallThrough = false;
|
|
}
|
|
}
|
|
|
|
// RemoveExtraEdges won't work if the block has an unanalyzable branch,
|
|
// which can happen here if TailBB is unanalyzable and is merged, so
|
|
// explicitly remove BBI1 and BBI2 as successors.
|
|
BBI.BB->removeSuccessor(BBI1->BB);
|
|
BBI.BB->removeSuccessor(BBI2->BB);
|
|
RemoveExtraEdges(BBI);
|
|
|
|
// Update block info.
|
|
BBI.IsDone = TrueBBI.IsDone = FalseBBI.IsDone = true;
|
|
InvalidatePreds(BBI.BB);
|
|
|
|
// FIXME: Must maintain LiveIns.
|
|
return true;
|
|
}
|
|
|
|
static bool MaySpeculate(const MachineInstr *MI,
|
|
SmallSet<unsigned, 4> &LaterRedefs,
|
|
const TargetInstrInfo *TII) {
|
|
bool SawStore = true;
|
|
if (!MI->isSafeToMove(TII, 0, SawStore))
|
|
return false;
|
|
|
|
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
|
|
const MachineOperand &MO = MI->getOperand(i);
|
|
if (!MO.isReg())
|
|
continue;
|
|
unsigned Reg = MO.getReg();
|
|
if (!Reg)
|
|
continue;
|
|
if (MO.isDef() && !LaterRedefs.count(Reg))
|
|
return false;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
/// PredicateBlock - Predicate instructions from the start of the block to the
|
|
/// specified end with the specified condition.
|
|
void IfConverter::PredicateBlock(BBInfo &BBI,
|
|
MachineBasicBlock::iterator E,
|
|
SmallVectorImpl<MachineOperand> &Cond,
|
|
SmallSet<unsigned, 4> &Redefs,
|
|
SmallSet<unsigned, 4> *LaterRedefs) {
|
|
bool AnyUnpred = false;
|
|
bool MaySpec = LaterRedefs != 0;
|
|
for (MachineBasicBlock::iterator I = BBI.BB->begin(); I != E; ++I) {
|
|
if (I->isDebugValue() || TII->isPredicated(I))
|
|
continue;
|
|
// It may be possible not to predicate an instruction if it's the 'true'
|
|
// side of a diamond and the 'false' side may re-define the instruction's
|
|
// defs.
|
|
if (MaySpec && MaySpeculate(I, *LaterRedefs, TII)) {
|
|
AnyUnpred = true;
|
|
continue;
|
|
}
|
|
// If any instruction is predicated, then every instruction after it must
|
|
// be predicated.
|
|
MaySpec = false;
|
|
if (!TII->PredicateInstruction(I, Cond)) {
|
|
#ifndef NDEBUG
|
|
dbgs() << "Unable to predicate " << *I << "!\n";
|
|
#endif
|
|
llvm_unreachable(0);
|
|
}
|
|
|
|
// If the predicated instruction now redefines a register as the result of
|
|
// if-conversion, add an implicit kill.
|
|
UpdatePredRedefs(I, Redefs, TRI, true);
|
|
}
|
|
|
|
std::copy(Cond.begin(), Cond.end(), std::back_inserter(BBI.Predicate));
|
|
|
|
BBI.IsAnalyzed = false;
|
|
BBI.NonPredSize = 0;
|
|
|
|
++NumIfConvBBs;
|
|
if (AnyUnpred)
|
|
++NumUnpred;
|
|
}
|
|
|
|
/// CopyAndPredicateBlock - Copy and predicate instructions from source BB to
|
|
/// the destination block. Skip end of block branches if IgnoreBr is true.
|
|
void IfConverter::CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
|
|
SmallVectorImpl<MachineOperand> &Cond,
|
|
SmallSet<unsigned, 4> &Redefs,
|
|
bool IgnoreBr) {
|
|
MachineFunction &MF = *ToBBI.BB->getParent();
|
|
|
|
for (MachineBasicBlock::iterator I = FromBBI.BB->begin(),
|
|
E = FromBBI.BB->end(); I != E; ++I) {
|
|
// Do not copy the end of the block branches.
|
|
if (IgnoreBr && I->isBranch())
|
|
break;
|
|
|
|
MachineInstr *MI = MF.CloneMachineInstr(I);
|
|
ToBBI.BB->insert(ToBBI.BB->end(), MI);
|
|
ToBBI.NonPredSize++;
|
|
unsigned ExtraPredCost = 0;
|
|
unsigned NumCycles = TII->getInstrLatency(InstrItins, &*I, &ExtraPredCost);
|
|
if (NumCycles > 1)
|
|
ToBBI.ExtraCost += NumCycles-1;
|
|
ToBBI.ExtraCost2 += ExtraPredCost;
|
|
|
|
if (!TII->isPredicated(I) && !MI->isDebugValue()) {
|
|
if (!TII->PredicateInstruction(MI, Cond)) {
|
|
#ifndef NDEBUG
|
|
dbgs() << "Unable to predicate " << *I << "!\n";
|
|
#endif
|
|
llvm_unreachable(0);
|
|
}
|
|
}
|
|
|
|
// If the predicated instruction now redefines a register as the result of
|
|
// if-conversion, add an implicit kill.
|
|
UpdatePredRedefs(MI, Redefs, TRI, true);
|
|
}
|
|
|
|
if (!IgnoreBr) {
|
|
std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(),
|
|
FromBBI.BB->succ_end());
|
|
MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
|
|
MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : NULL;
|
|
|
|
for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
|
|
MachineBasicBlock *Succ = Succs[i];
|
|
// Fallthrough edge can't be transferred.
|
|
if (Succ == FallThrough)
|
|
continue;
|
|
ToBBI.BB->addSuccessor(Succ);
|
|
}
|
|
}
|
|
|
|
std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(),
|
|
std::back_inserter(ToBBI.Predicate));
|
|
std::copy(Cond.begin(), Cond.end(), std::back_inserter(ToBBI.Predicate));
|
|
|
|
ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
|
|
ToBBI.IsAnalyzed = false;
|
|
|
|
++NumDupBBs;
|
|
}
|
|
|
|
/// MergeBlocks - Move all instructions from FromBB to the end of ToBB.
|
|
/// This will leave FromBB as an empty block, so remove all of its
|
|
/// successor edges except for the fall-through edge. If AddEdges is true,
|
|
/// i.e., when FromBBI's branch is being moved, add those successor edges to
|
|
/// ToBBI.
|
|
void IfConverter::MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges) {
|
|
ToBBI.BB->splice(ToBBI.BB->end(),
|
|
FromBBI.BB, FromBBI.BB->begin(), FromBBI.BB->end());
|
|
|
|
std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(),
|
|
FromBBI.BB->succ_end());
|
|
MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
|
|
MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : NULL;
|
|
|
|
for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
|
|
MachineBasicBlock *Succ = Succs[i];
|
|
// Fallthrough edge can't be transferred.
|
|
if (Succ == FallThrough)
|
|
continue;
|
|
FromBBI.BB->removeSuccessor(Succ);
|
|
if (AddEdges)
|
|
ToBBI.BB->addSuccessor(Succ);
|
|
}
|
|
|
|
// Now FromBBI always falls through to the next block!
|
|
if (NBB && !FromBBI.BB->isSuccessor(NBB))
|
|
FromBBI.BB->addSuccessor(NBB);
|
|
|
|
std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(),
|
|
std::back_inserter(ToBBI.Predicate));
|
|
FromBBI.Predicate.clear();
|
|
|
|
ToBBI.NonPredSize += FromBBI.NonPredSize;
|
|
ToBBI.ExtraCost += FromBBI.ExtraCost;
|
|
ToBBI.ExtraCost2 += FromBBI.ExtraCost2;
|
|
FromBBI.NonPredSize = 0;
|
|
FromBBI.ExtraCost = 0;
|
|
FromBBI.ExtraCost2 = 0;
|
|
|
|
ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
|
|
ToBBI.HasFallThrough = FromBBI.HasFallThrough;
|
|
ToBBI.IsAnalyzed = false;
|
|
FromBBI.IsAnalyzed = false;
|
|
}
|