llvm-6502/test/MC
Daniel Sanders 5535fca8bf Revert: r215698 - Current implementation of c.cond.fmt instructions only accept default cc0 register...
It causes a number of regressions when -fintegrated-as is enabled. This happens
because there are codegen-only instructions that incorrectly uses the first
operand as the encoding for the $fcc register. The regressions do not occur when
-via-file-asm is also given.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215847 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-17 19:47:47 +00:00
..
AArch64 MC: AsmLexer: handle multi-character CommentStrings correctly 2014-08-14 02:51:43 +00:00
ARM ARM: correct toggling behaviour 2014-08-17 19:20:38 +00:00
AsmParser MC: AsmLexer: handle multi-character CommentStrings correctly 2014-08-14 02:51:43 +00:00
COFF MC: Diagnose an unexpected token in COFF .section instead of asserting 2014-08-11 18:34:43 +00:00
Disassembler ARM: implement MRS/MSR (banked reg) system instructions. 2014-08-15 10:47:12 +00:00
ELF Avoid revocations when possible. 2014-07-01 14:34:30 +00:00
MachO X86: drop relocations on __eh_frame sections globally. 2014-07-22 15:47:09 +00:00
Markup
Mips Revert: r215698 - Current implementation of c.cond.fmt instructions only accept default cc0 register... 2014-08-17 19:47:47 +00:00
PowerPC @l and friends adjust their value depending the context used in. 2014-08-10 12:41:50 +00:00
Sparc Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
SystemZ [SystemZ] Add MC support for LEDBRA, LEXBRA and LDXBRA 2014-07-10 11:00:55 +00:00
X86 Remove HasLEB128. 2014-08-15 14:01:07 +00:00