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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15632 91177308-0d34-0410-b5e6-96231b3b80d8
139 lines
5.5 KiB
C++
139 lines
5.5 KiB
C++
//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes the general parts of a Target machine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_TARGETMACHINE_H
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#define LLVM_TARGET_TARGETMACHINE_H
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#include "llvm/Target/TargetData.h"
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#include <cassert>
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namespace llvm {
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class TargetInstrInfo;
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class TargetInstrDescriptor;
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class TargetJITInfo;
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class TargetSchedInfo;
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class SparcV9RegInfo;
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class TargetFrameInfo;
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class MachineCodeEmitter;
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class MRegisterInfo;
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class FunctionPassManager;
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class PassManager;
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class Pass;
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class IntrinsicLowering;
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//===----------------------------------------------------------------------===//
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///
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/// TargetMachine - Primary interface to the complete machine description for
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/// the target machine. All target-specific information should be accessible
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/// through this interface.
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///
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class TargetMachine {
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const std::string Name;
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const TargetData DataLayout; // Calculates type size & alignment
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IntrinsicLowering *IL; // Specifies how to lower intrinsic calls
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TargetMachine(const TargetMachine&); // DO NOT IMPLEMENT
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void operator=(const TargetMachine&); // DO NOT IMPLEMENT
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protected: // Can only create subclasses...
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TargetMachine(const std::string &name, IntrinsicLowering *IL,
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bool LittleEndian = false,
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unsigned char PtrSize = 8, unsigned char PtrAl = 8,
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unsigned char DoubleAl = 8, unsigned char FloatAl = 4,
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unsigned char LongAl = 8, unsigned char IntAl = 4,
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unsigned char ShortAl = 2, unsigned char ByteAl = 1,
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unsigned char BoolAl = 1);
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TargetMachine(const std::string &name, IntrinsicLowering *IL,
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const TargetData &TD);
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/// This constructor is used for targets that support arbitrary TargetData
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/// layouts, like the C backend. It initializes the TargetData to match that
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/// of the specified module.
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///
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TargetMachine(const std::string &name, IntrinsicLowering *IL,
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const Module &M);
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public:
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virtual ~TargetMachine();
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/// getModuleMatchQuality - This static method should be implemented by
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/// targets to indicate how closely they match the specified module. This is
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/// used by the LLC tool to determine which target to use when an explicit
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/// -march option is not specified. If a target returns zero, it will never
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/// be chosen without an explicit -march option.
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static unsigned getModuleMatchQuality(const Module &M) { return 0; }
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/// getJITMatchQuality - This static method should be implemented by targets
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/// that provide JIT capabilities to indicate how suitable they are for
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/// execution on the current host. If a value of 0 is returned, the target
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/// will not be used unless an explicit -march option is used.
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static unsigned getJITMatchQuality() { return 0; }
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const std::string &getName() const { return Name; }
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/// getIntrinsicLowering - This method returns a reference to an
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/// IntrinsicLowering instance which should be used by the code generator to
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/// lower unknown intrinsic functions to the equivalent LLVM expansion.
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///
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IntrinsicLowering &getIntrinsicLowering() const { return *IL; }
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// Interfaces to the major aspects of target machine information:
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// -- Instruction opcode and operand information
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// -- Pipelines and scheduling information
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// -- Stack frame information
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//
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virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
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virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
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const TargetData &getTargetData() const { return DataLayout; }
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/// getRegisterInfo - If register information is available, return it. If
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/// not, return null. This is kept separate from RegInfo until RegInfo has
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/// details of graph coloring register allocation removed from it.
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///
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virtual const MRegisterInfo* getRegisterInfo() const { return 0; }
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/// getJITInfo - If this target supports a JIT, return information for it,
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/// otherwise return null.
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///
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virtual TargetJITInfo *getJITInfo() { return 0; }
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// These are deprecated interfaces.
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virtual const TargetSchedInfo *getSchedInfo() const { return 0; }
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virtual const SparcV9RegInfo *getRegInfo() const { return 0; }
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/// addPassesToEmitAssembly - Add passes to the specified pass manager to get
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/// assembly langage code emitted. Typically this will involve several steps
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/// of code generation. This method should return true if assembly emission
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/// is not supported.
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///
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virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) {
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return true;
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}
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/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
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/// get machine code emitted. This uses a MachineCodeEmitter object to handle
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/// actually outputting the machine code and resolving things like the address
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/// of functions. This method should returns true if machine code emission is
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/// not supported.
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///
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virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
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MachineCodeEmitter &MCE) {
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return true;
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}
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};
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} // End llvm namespace
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#endif
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