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2da8bc8a5f
DAG scheduling during isel. Most new functionality is currently guarded by -enable-sched-cycles and -enable-sched-hazard. Added InstrItineraryData::IssueWidth field, currently derived from ARM itineraries, but could be initialized differently on other targets. Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is active, and if so how many cycles of state it holds. Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry into the scheduler's available queue. ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to get information about it's SUnits, provides RecedeCycle for bottom-up scheduling, correctly computes scoreboard depth, tracks IssueCount, and considers potential stall cycles when checking for hazards. ScheduleDAGRRList now models machine cycles and hazards (under flags). It tracks MinAvailableCycle, drives the hazard recognizer and priority queue's ready filter, manages a new PendingQueue, properly accounts for stall cycles, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
92 lines
3.4 KiB
C++
92 lines
3.4 KiB
C++
//=- llvm/CodeGen/ScheduleHazardRecognizer.h - Scheduling Support -*- C++ -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the ScheduleHazardRecognizer class, which implements
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// hazard-avoidance heuristics for scheduling.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_SCHEDULEHAZARDRECOGNIZER_H
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#define LLVM_CODEGEN_SCHEDULEHAZARDRECOGNIZER_H
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namespace llvm {
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class SUnit;
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/// HazardRecognizer - This determines whether or not an instruction can be
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/// issued this cycle, and whether or not a noop needs to be inserted to handle
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/// the hazard.
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class ScheduleHazardRecognizer {
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protected:
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/// MaxLookAhead - Indicate the number of cycles in the scoreboard
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/// state. Important to restore the state after backtracking. Additionally,
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/// MaxLookAhead=0 identifies a fake recognizer, allowing the client to
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/// bypass virtual calls. Currently the PostRA scheduler ignores it.
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unsigned MaxLookAhead;
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public:
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ScheduleHazardRecognizer(): MaxLookAhead(0) {}
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virtual ~ScheduleHazardRecognizer();
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enum HazardType {
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NoHazard, // This instruction can be emitted at this cycle.
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Hazard, // This instruction can't be emitted at this cycle.
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NoopHazard // This instruction can't be emitted, and needs noops.
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};
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unsigned getMaxLookAhead() const { return MaxLookAhead; }
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/// atIssueLimit - Return true if no more instructions may be issued in this
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/// cycle.
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virtual bool atIssueLimit() const { return false; }
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/// getHazardType - Return the hazard type of emitting this node. There are
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/// three possible results. Either:
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/// * NoHazard: it is legal to issue this instruction on this cycle.
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/// * Hazard: issuing this instruction would stall the machine. If some
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/// other instruction is available, issue it first.
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/// * NoopHazard: issuing this instruction would break the program. If
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/// some other instruction can be issued, do so, otherwise issue a noop.
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virtual HazardType getHazardType(SUnit *m, int Stalls) {
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return NoHazard;
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}
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/// Reset - This callback is invoked when a new block of
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/// instructions is about to be schedule. The hazard state should be
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/// set to an initialized state.
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virtual void Reset() {}
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/// EmitInstruction - This callback is invoked when an instruction is
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/// emitted, to advance the hazard state.
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virtual void EmitInstruction(SUnit *) {}
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/// AdvanceCycle - This callback is invoked whenever the next top-down
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/// instruction to be scheduled cannot issue in the current cycle, either
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/// because of latency or resource conflicts. This should increment the
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/// internal state of the hazard recognizer so that previously "Hazard"
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/// instructions will now not be hazards.
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virtual void AdvanceCycle() {}
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/// RecedeCycle - This callback is invoked whenever the next bottom-up
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/// instruction to be scheduled cannot issue in the current cycle, either
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/// because of latency or resource conflicts.
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virtual void RecedeCycle() {}
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/// EmitNoop - This callback is invoked when a noop was added to the
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/// instruction stream.
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virtual void EmitNoop() {
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// Default implementation: count it as a cycle.
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AdvanceCycle();
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}
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};
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}
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#endif
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