mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-26 23:29:22 +00:00
e2d6f91d63
For some reason I never got around to adding these at the same time as the signed versions. No idea why. I'm not sure whether this SystemZII::BranchC* stuff is useful, or whether it should just be replaced with an "is normal" flag. I'll leave that for later though. There are some boundary conditions that can be tweaked, such as preferring unsigned comparisons for equality with [128, 256), and "<= 255" over "< 256", but again I'll leave those for a separate patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190930 91177308-0d34-0410-b5e6-96231b3b80d8
122 lines
2.6 KiB
LLVM
122 lines
2.6 KiB
LLVM
; Test 32-bit comparisons in which the second operand is zero-extended
|
|
; from a PC-relative i16.
|
|
;
|
|
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
|
|
|
|
@g = global i16 1
|
|
@h = global i16 1, align 1, section "foo"
|
|
|
|
; Check unsigned comparison.
|
|
define i32 @f1(i32 %src1) {
|
|
; CHECK-LABEL: f1:
|
|
; CHECK: clhrl %r2, g
|
|
; CHECK-NEXT: jl
|
|
; CHECK: br %r14
|
|
entry:
|
|
%val = load i16 *@g
|
|
%src2 = zext i16 %val to i32
|
|
%cond = icmp ult i32 %src1, %src2
|
|
br i1 %cond, label %exit, label %mulb
|
|
mulb:
|
|
%mul = mul i32 %src1, %src1
|
|
br label %exit
|
|
exit:
|
|
%res = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
|
|
ret i32 %res
|
|
}
|
|
|
|
; Check signed comparison.
|
|
define i32 @f2(i32 %src1) {
|
|
; CHECK-LABEL: f2:
|
|
; CHECK-NOT: clhrl
|
|
; CHECK: br %r14
|
|
entry:
|
|
%val = load i16 *@g
|
|
%src2 = zext i16 %val to i32
|
|
%cond = icmp slt i32 %src1, %src2
|
|
br i1 %cond, label %exit, label %mulb
|
|
mulb:
|
|
%mul = mul i32 %src1, %src1
|
|
br label %exit
|
|
exit:
|
|
%res = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
|
|
ret i32 %res
|
|
}
|
|
|
|
; Check equality.
|
|
define i32 @f3(i32 %src1) {
|
|
; CHECK-LABEL: f3:
|
|
; CHECK: clhrl %r2, g
|
|
; CHECK-NEXT: je
|
|
; CHECK: br %r14
|
|
entry:
|
|
%val = load i16 *@g
|
|
%src2 = zext i16 %val to i32
|
|
%cond = icmp eq i32 %src1, %src2
|
|
br i1 %cond, label %exit, label %mulb
|
|
mulb:
|
|
%mul = mul i32 %src1, %src1
|
|
br label %exit
|
|
exit:
|
|
%res = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
|
|
ret i32 %res
|
|
}
|
|
|
|
; Check inequality.
|
|
define i32 @f4(i32 %src1) {
|
|
; CHECK-LABEL: f4:
|
|
; CHECK: clhrl %r2, g
|
|
; CHECK-NEXT: jlh
|
|
; CHECK: br %r14
|
|
entry:
|
|
%val = load i16 *@g
|
|
%src2 = zext i16 %val to i32
|
|
%cond = icmp ne i32 %src1, %src2
|
|
br i1 %cond, label %exit, label %mulb
|
|
mulb:
|
|
%mul = mul i32 %src1, %src1
|
|
br label %exit
|
|
exit:
|
|
%res = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
|
|
ret i32 %res
|
|
}
|
|
|
|
; Repeat f1 with an unaligned address.
|
|
define i32 @f5(i32 %src1) {
|
|
; CHECK-LABEL: f5:
|
|
; CHECK: lgrl [[REG:%r[0-5]]], h@GOT
|
|
; CHECK: llh [[VAL:%r[0-5]]], 0([[REG]])
|
|
; CHECK: clrjl %r2, [[VAL]],
|
|
; CHECK: br %r14
|
|
entry:
|
|
%val = load i16 *@h, align 1
|
|
%src2 = zext i16 %val to i32
|
|
%cond = icmp ult i32 %src1, %src2
|
|
br i1 %cond, label %exit, label %mulb
|
|
mulb:
|
|
%mul = mul i32 %src1, %src1
|
|
br label %exit
|
|
exit:
|
|
%res = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
|
|
ret i32 %res
|
|
}
|
|
|
|
; Check the comparison can be reversed if that allows CLHRL to be used.
|
|
define i32 @f6(i32 %src2) {
|
|
; CHECK-LABEL: f6:
|
|
; CHECK: clhrl %r2, g
|
|
; CHECK-NEXT: jh {{\.L.*}}
|
|
; CHECK: br %r14
|
|
entry:
|
|
%val = load i16 *@g
|
|
%src1 = zext i16 %val to i32
|
|
%cond = icmp ult i32 %src1, %src2
|
|
br i1 %cond, label %exit, label %mulb
|
|
mulb:
|
|
%mul = mul i32 %src2, %src2
|
|
br label %exit
|
|
exit:
|
|
%res = phi i32 [ %src2, %entry ], [ %mul, %mulb ]
|
|
ret i32 %res
|
|
}
|