Venkatraman Govindaraju 46713296e0 Implement support for byval arguments in Sparc backend. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123974 91177308-0d34-0410-b5e6-96231b3b80d8

2011-01-21 14:00:01 +00:00

..

Alpha

If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.

2010-12-06 22:39:26 +00:00

ARM

Enable support for precise scheduling of the instruction selection

2011-01-21 06:19:05 +00:00

Blackfin

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CBackend

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CellSPU

Allow sign-extending of i8 and i16 to i128 on SPU.

2011-01-20 15:49:06 +00:00

CPP

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Generic

fix rdar://8878965, a regression I introduced with the recent

2011-01-18 20:53:04 +00:00

MBlaze

Lower the MBlaze target specific calling conventions for "interrupt_handler"

2010-12-15 20:27:28 +00:00

Mips

Add support for mips32 madd and msub instructions. Patch by Akira Hatanaka

2011-01-18 19:29:17 +00:00

MSP430

If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.

2010-12-06 22:39:26 +00:00

PowerPC

Restore the behavior of frame lowering before my refactoring.

2010-12-18 19:53:14 +00:00

PTX

ptx: remove reg-reg addressing mode and st.const

2011-01-01 11:58:58 +00:00

SPARC

Implement support for byval arguments in Sparc backend.

2011-01-21 14:00:01 +00:00

SystemZ

If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.

2010-12-06 22:39:26 +00:00

Thumb

Sorry, several patches in one.

2011-01-20 08:34:58 +00:00

Thumb2

Enable support for precise scheduling of the instruction selection

2011-01-21 06:19:05 +00:00

X86

Expand invalid return values for umulo and smulo. Handle these similarly

2011-01-20 08:54:28 +00:00

XCore

Update tests.

2011-01-16 18:02:57 +00:00

thumb2-mul.ll

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