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746a49516c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15809 91177308-0d34-0410-b5e6-96231b3b80d8
45 lines
1.5 KiB
Plaintext
45 lines
1.5 KiB
Plaintext
TODO:
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* use stfiwx in float->int
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* implement cast fp to bool
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* implement algebraic shift right long by reg
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* implement scheduling info
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* implement powerpc-64 for darwin
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* implement powerpc-64 for aix
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* fix rlwimi generation to be use-and-def
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* fix ulong to double:
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floatdidf assumes signed longs. so if the high but of a ulong
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just happens to be set, you get the wrong sign. The fix for this
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is to call cmpdi2 to compare against zero, if so shift right by one,
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convert to fp, and multiply by (add to itself). the sequence would
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look like:
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{r3:r4} holds ulong a;
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li r5, 0
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li r6, 0 (set r5:r6 to ulong 0)
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call cmpdi2 ==> sets r3 <, =, > 0
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if r3 > 0
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call floatdidf as usual
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else
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shift right ulong a, 1 (we could use emitShift)
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call floatdidf
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fadd f1, f1, f1 (fp left shift by 1)
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* setCondInst needs to know branchless versions of seteq/setne/etc
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* cast elimination pass (uint -> sbyte -> short, kill the byte -> short)
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* should hint to the branch select pass that it doesn't need to print the
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second unconditional branch, so we don't end up with things like:
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b .LBBl42__2E_expand_function_8_674 ; loopentry.24
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b .LBBl42__2E_expand_function_8_42 ; NewDefault
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b .LBBl42__2E_expand_function_8_42 ; NewDefault
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Currently failing tests that should pass:
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* SingleSource
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`- Regression
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| `- casts (ulong to fp failure)
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`- Benchmarks
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| `- Shootout-C++ : most programs fail, miscompilations
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* MultiSource
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|- Applications
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| `- hbd: miscompilation
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| `- d (make_dparser): miscompilation
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`- Benchmarks
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`- MallocBench/gs: miscompilation
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