Vincent Lejeune f2cfef8172 R600: Do not predicated basic block with multiple alu clause ...

Test is not included as it is several 1000 lines long.
To test this functionnality, a test case must generate at least 2 ALU clauses,
where an ALU clause is ~110 instructions long.

NOTE: This is a candidate for the stable branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185943 91177308-0d34-0410-b5e6-96231b3b80d8

2013-07-09 15:03:33 +00:00

..

InstPrinter

R600: Bank Swizzle now display SCL equivalent

2013-06-29 19:32:29 +00:00

MCTargetDesc

Remove address spaces from MC.

2013-07-02 15:49:13 +00:00

TargetInfo

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AMDGPU.h

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AMDGPU.td

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AMDGPUAsmPrinter.cpp

R600: Add local memory support via LDS

2013-06-28 15:47:08 +00:00

AMDGPUAsmPrinter.h

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AMDGPUCallingConv.td

R600/SI: Add support for v4i32 and v4f32 kernel args

2013-06-25 02:39:25 +00:00

AMDGPUConvertToISA.cpp

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AMDGPUFrameLowering.cpp

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AMDGPUFrameLowering.h

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AMDGPUIndirectAddressing.cpp

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AMDGPUInstrInfo.cpp

R600: Use new getNamedOperandIdx function generated by TableGen

2013-06-25 21:22:18 +00:00

AMDGPUInstrInfo.h

R600: Use new getNamedOperandIdx function generated by TableGen

2013-06-25 21:22:18 +00:00

AMDGPUInstrInfo.td

…

AMDGPUInstructions.td

R600: Add local memory support via LDS

2013-06-28 15:47:08 +00:00

AMDGPUIntrinsics.td

R600: Add support for GROUP_BARRIER instruction

2013-06-28 15:46:59 +00:00

AMDGPUISelLowering.cpp

R600: Add local memory support via LDS

2013-06-28 15:47:08 +00:00

AMDGPUISelLowering.h

R600: Use DAG lowering pass to handle fcos/fsin

2013-07-09 15:03:11 +00:00

AMDGPUMachineFunction.cpp

R600: Add local memory support via LDS

2013-06-28 15:47:08 +00:00

AMDGPUMachineFunction.h

R600: Add local memory support via LDS

2013-06-28 15:47:08 +00:00

AMDGPUMCInstLower.cpp

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AMDGPUMCInstLower.h

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AMDGPURegisterInfo.cpp

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AMDGPURegisterInfo.h

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AMDGPURegisterInfo.td

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AMDGPUSubtarget.cpp

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AMDGPUSubtarget.h

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AMDGPUTargetMachine.cpp

R600: Do not predicated basic block with multiple alu clause

2013-07-09 15:03:33 +00:00

AMDGPUTargetMachine.h

Remove dead prototype.

2013-06-18 06:24:14 +00:00

AMDILBase.td

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AMDILCFGStructurizer.cpp

Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size.

2013-07-03 15:07:05 +00:00

AMDILInstrInfo.td

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AMDILIntrinsicInfo.cpp

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AMDILIntrinsicInfo.h

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AMDILIntrinsics.td

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AMDILISelDAGToDAG.cpp

R600: Add local memory support via LDS

2013-06-28 15:47:08 +00:00

AMDILISelLowering.cpp

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AMDILRegisterInfo.td

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CMakeLists.txt

Move StructurizeCFG out of R600 to generic Transforms.

2013-06-19 20:18:24 +00:00

LLVMBuild.txt

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Makefile

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Processors.td

Add a newline.

2013-07-01 21:31:10 +00:00

R600ControlFlowFinalizer.cpp

R600: Do not predicated basic block with multiple alu clause

2013-07-09 15:03:33 +00:00

R600Defines.h

R600: Add local memory support via LDS

2013-06-28 15:47:08 +00:00

R600EmitClauseMarkers.cpp

R600: Do not predicated basic block with multiple alu clause

2013-07-09 15:03:33 +00:00

R600ExpandSpecialInstrs.cpp

R600: Use new getNamedOperandIdx function generated by TableGen

2013-06-25 21:22:18 +00:00

R600InstrFormats.td

R600: Add local memory support via LDS

2013-06-28 15:47:08 +00:00

R600InstrInfo.cpp

R600: Do not predicated basic block with multiple alu clause

2013-07-09 15:03:33 +00:00

R600InstrInfo.h

R600: Support schedule and packetization of trans-only inst

2013-06-29 19:32:43 +00:00

R600Instructions.td

R600: Do not predicated basic block with multiple alu clause

2013-07-09 15:03:33 +00:00

R600Intrinsics.td

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R600ISelLowering.cpp

R600: Fix a rare bug where swizzle optimization returns wrong values

2013-07-09 15:03:25 +00:00

R600ISelLowering.h

R600: Use DAG lowering pass to handle fcos/fsin

2013-07-09 15:03:11 +00:00

R600MachineFunctionInfo.cpp

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R600MachineFunctionInfo.h

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R600MachineScheduler.cpp

R600: Support schedule and packetization of trans-only inst

2013-06-29 19:32:43 +00:00

R600MachineScheduler.h

R600: Support schedule and packetization of trans-only inst

2013-06-29 19:32:43 +00:00

R600OptimizeVectorRegisters.cpp

R600: Fix wrong export reswizzling

2013-07-09 15:03:19 +00:00

R600Packetizer.cpp

R600: Do not predicated basic block with multiple alu clause

2013-07-09 15:03:33 +00:00

R600RegisterInfo.cpp

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R600RegisterInfo.h

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R600RegisterInfo.td

R600: Support schedule and packetization of trans-only inst

2013-06-29 19:32:43 +00:00

R600Schedule.td

R600: Add local memory support via LDS

2013-06-28 15:47:08 +00:00

R600TextureIntrinsicsReplacer.cpp

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SIAnnotateControlFlow.cpp

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SIDefines.h

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SIInsertWaits.cpp

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SIInstrFormats.td

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SIInstrInfo.cpp

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SIInstrInfo.h

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SIInstrInfo.td

Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.

2013-06-19 21:36:55 +00:00

SIInstructions.td

R600: Add SI load support for v[24]i32 and store for v2i32

2013-06-15 00:09:31 +00:00

SIIntrinsics.td

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SIISelLowering.cpp

R600: Consolidate expansion of v2i32/v4i32 ops for EG/SI

2013-06-25 13:55:57 +00:00

SIISelLowering.h

R600/SI: Report unaligned memory accesses as legal for > 32-bit types

2013-06-25 02:39:35 +00:00

SILowerControlFlow.cpp

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SIMachineFunctionInfo.cpp

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SIMachineFunctionInfo.h

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SIRegisterInfo.cpp

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SIRegisterInfo.h

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SIRegisterInfo.td

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SISchedule.td

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