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0488fb649a
The x86_mmx type is used for MMX intrinsics, parameters and return values where these use MMX registers, and is also supported in load, store, and bitcast. Only the above operations generate MMX instructions, and optimizations do not operate on or produce MMX intrinsics. MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into smaller pieces. Optimizations may occur on these forms and the result casted back to x86_mmx, provided the result feeds into a previous existing x86_mmx operation. The point of all this is prevent optimizations from introducing MMX operations, which is unsafe due to the EMMS problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8
36 lines
1.0 KiB
LLVM
36 lines
1.0 KiB
LLVM
; RUN: llc < %s -march=x86 -mattr=+sse2 -mattr=+mmx | grep unpcklpd
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; RUN: llc < %s -march=x86 -mattr=+sse2 -mattr=+mmx | grep unpckhpd
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; RUN: llc < %s -march=x86 -mattr=+sse2 | grep cvttpd2pi | count 1
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; RUN: llc < %s -march=x86 -mattr=+sse2 | grep cvtpi2pd | count 1
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; originally from PR2687, but things don't work that way any more.
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; there are no MMX instructions here; we use XMM.
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define <2 x double> @a(<2 x i32> %x) nounwind {
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entry:
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%y = sitofp <2 x i32> %x to <2 x double>
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ret <2 x double> %y
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}
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define <2 x i32> @b(<2 x double> %x) nounwind {
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entry:
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%y = fptosi <2 x double> %x to <2 x i32>
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ret <2 x i32> %y
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}
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; This is how to get MMX instructions.
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define <2 x double> @a2(x86_mmx %x) nounwind {
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entry:
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%y = tail call <2 x double> @llvm.x86.sse.cvtpi2pd(x86_mmx %x)
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ret <2 x double> %y
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}
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define x86_mmx @b2(<2 x double> %x) nounwind {
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entry:
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%y = tail call x86_mmx @llvm.x86.sse.cvttpd2pi (<2 x double> %x)
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ret x86_mmx %y
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}
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declare <2 x double> @llvm.x86.sse.cvtpi2pd(x86_mmx)
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declare x86_mmx @llvm.x86.sse.cvttpd2pi(<2 x double>)
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