mirror of
https://github.com/c64scene-ar/llvm-6502.git
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47ab8c106f
This allows the RegisterCoalescer to join "non-flipped" range pairs with a physical destination register -- which allows the RegisterCoalescer to remove copies like this: <vreg> = something (maybe a load, for example) ... (things that don't use PHYSREG) PHYSREG = COPY <vreg> (with all of the restrictions normally applied by the RegisterCoalescer: having compatible register classes, etc. ) Previously, the RegisterCoalescer handled only the opposite case (copying *from* a physical register). I don't handle the problem fully here, but try to get the common case where there is only one use of <vreg> (the COPY). An upcoming commit to the PowerPC backend will make this pattern much more common on PPC64/ELF systems. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226071 91177308-0d34-0410-b5e6-96231b3b80d8
69 lines
2.2 KiB
LLVM
69 lines
2.2 KiB
LLVM
; RUN: llc -mcpu=generic -mtriple=arm-eabi < %s | FileCheck %s
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%struct.comment = type { i8**, i32*, i32, i8* }
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%struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
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%struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
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@str215 = external global [2 x i8]
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define void @t1(%struct.state* %v) {
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; Make sure we generate:
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; sub sp, sp, r1
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; instead of:
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; sub r1, sp, r1
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; mov sp, r1
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; CHECK-LABEL: @t1
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; CHECK: bic [[REG1:r[0-9]+]],
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; CHECK-NOT: sub r{{[0-9]+}}, sp, [[REG1]]
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; CHECK: sub sp, sp, [[REG1]]
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%tmp6 = load i32* null
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%tmp8 = alloca float, i32 %tmp6
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store i32 1, i32* null
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br i1 false, label %bb123.preheader, label %return
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bb123.preheader: ; preds = %0
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br i1 false, label %bb43, label %return
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bb43: ; preds = %bb123.preheader
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call fastcc void @f1(float* %tmp8, float* null, i32 0)
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%tmp70 = load i32* null
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%tmp85 = getelementptr float* %tmp8, i32 0
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call fastcc void @f2(float* null, float* null, float* %tmp85, i32 %tmp70)
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ret void
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return: ; preds = %bb123.preheader, %0
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ret void
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}
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declare fastcc void @f1(float*, float*, i32)
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declare fastcc void @f2(float*, float*, float*, i32)
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define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) {
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%tmp1 = call i32 @strlen(i8* %tag)
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%tmp3 = call i32 @strlen(i8* %contents)
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%tmp4 = add i32 %tmp1, 2
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%tmp5 = add i32 %tmp4, %tmp3
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%tmp6 = alloca i8, i32 %tmp5
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%tmp9 = call i8* @strcpy(i8* %tmp6, i8* %tag)
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%tmp6.len = call i32 @strlen(i8* %tmp6)
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%tmp6.indexed = getelementptr i8* %tmp6, i32 %tmp6.len
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp6.indexed, i8* getelementptr inbounds ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1, i1 false)
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%tmp15 = call i8* @strcat(i8* %tmp6, i8* %contents)
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call fastcc void @comment_add(%struct.comment* %vc, i8* %tmp6)
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ret void
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}
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declare i32 @strlen(i8*)
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declare i8* @strcat(i8*, i8*)
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declare fastcc void @comment_add(%struct.comment*, i8*)
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declare i8* @strcpy(i8*, i8*)
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
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