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https://github.com/c64scene-ar/llvm-6502.git
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d8c87888a7
A major part of its (eventual) goal is to support a much cleaner separation between disassembly callbacks provided by the target and the disassembler emitter itself, i.e. not requiring hardcoding of knowledge in tblgen like the existing disassembly emitters do. The hope is that some day this will allow us to replace the existing non-Thumb ARM disassembler and remove some of the hacks the old one introduced to tblgen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125966 91177308-0d34-0410-b5e6-96231b3b80d8
57 lines
1.5 KiB
C++
57 lines
1.5 KiB
C++
//===------------ FixedLenDecoderEmitter.h - Decoder Generator --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// It contains the tablegen backend that emits the decoder functions for
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// targets with fixed length instruction set.
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//
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//===----------------------------------------------------------------------===//
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#ifndef FixedLenDECODEREMITTER_H
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#define FixedLenDECODEREMITTER_H
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#include "CodeGenTarget.h"
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#include "TableGenBackend.h"
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#include "llvm/Support/DataTypes.h"
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namespace llvm {
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struct OperandInfo {
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unsigned FieldBase;
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unsigned FieldLength;
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std::string Decoder;
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OperandInfo(unsigned FB, unsigned FL, std::string D)
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: FieldBase(FB), FieldLength(FL), Decoder(D) { }
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};
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class FixedLenDecoderEmitter : public TableGenBackend {
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public:
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FixedLenDecoderEmitter(RecordKeeper &R) :
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Records(R), Target(R),
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NumberedInstructions(Target.getInstructionsByEnumValue()) {}
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// run - Output the code emitter
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void run(raw_ostream &o);
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private:
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RecordKeeper &Records;
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CodeGenTarget Target;
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std::vector<const CodeGenInstruction*> NumberedInstructions;
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std::vector<unsigned> Opcodes;
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std::map<unsigned, std::vector<OperandInfo> > Operands;
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bool populateInstruction(const CodeGenInstruction &CGI, unsigned Opc);
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void populateInstructions();
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};
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} // end llvm namespace
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#endif
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