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The following is checked: * Operand counts: All explicit operands must be present. * Register classes: All physical and virtual register operands must be compatible with the register class required by the instruction descriptor. * Register live intervals: Registers must be defined only once, and must be defined before use. The machine code verifier is enabled with the command-line option '-verify-machineinstrs', or by defining the environment variable LLVM_VERIFY_MACHINEINSTRS to the name of a file that will receive all the verifier errors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71918 91177308-0d34-0410-b5e6-96231b3b80d8 |
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Analysis | ||
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AsmParser | ||
Bitcode | ||
CodeGen | ||
CompilerDriver | ||
Debugger | ||
ExecutionEngine | ||
Linker | ||
Support | ||
System | ||
Target | ||
Transforms | ||
VMCore | ||
Makefile |