mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-24 06:30:19 +00:00
157536b1fb
rdar://problem/9230801 ARM disassembler discrepancy: erroneously accepting SRS Plus add invalid-RFEorLDMIA-arm.txt test which should have been checked in with http://llvm.org/viewvc/llvm-project?view=rev&revision=128859. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128864 91177308-0d34-0410-b5e6-96231b3b80d8
12 lines
735 B
Plaintext
12 lines
735 B
Plaintext
# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
|
|
|
|
# Opcode=134 Name=LDMIA Format=ARM_FORMAT_LDSTMULFRM(10)
|
|
# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
|
# -------------------------------------------------------------------------------------------------
|
|
# | 1: 1: 1: 1| 1: 0: 0: 0| 1: 0: 0: 1| 1: 0: 0: 1| 1: 0: 1: 1| 0: 0: 0: 1| 0: 0: 1: 1| 0: 0: 1: 0|
|
|
# -------------------------------------------------------------------------------------------------
|
|
#
|
|
# B6.1.8 RFE has Inst{15-0} as 0x0a00 ==> Not an RFE instruction
|
|
# A8.6.53 LDM/LDMIA/LDMFD is predicated with Inst{31-28} as cond ==> Not an LDMIA instruction
|
|
0x32 0xb1 0x99 0xf8
|