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https://github.com/c64scene-ar/llvm-6502.git
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edb27188b4
This commit fixes a bug in PPCRegisterInfo::isFrameOffsetLegal that
could result in the LocalStackAlloc pass creating an MI instruction
out-of-range displacement:
%vreg17<def> = LD 33184, %vreg31; mem:LD8[%g](align=32)
%G8RC:%vreg17 G8RC_and_G8RC_NOX0:%vreg31
(In final assembler output the top bits are stripped off, resulting
in a negative offset loading from below the stack pointer.)
Common code expects the isFrameOffsetLegal routine to verify whether
adding a given offset to the offset already present in the instruction
results in a valid displacement. However, on PowerPC the routine
did not take the already present instruction offset into account.
This commit fixes isFrameOffsetLegal to add the instruction offset,
and updates a local caller (needsFrameBaseReg) to no longer add the
instruction offset itself before calling isFrameOffsetLegal.
Reviewed by Hal Finkel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212832 91177308-0d34-0410-b5e6-96231b3b80d8
72 lines
3.2 KiB
LLVM
72 lines
3.2 KiB
LLVM
; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -print-after=localstackalloc <%s >%t 2>&1 && FileCheck <%t %s
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; Due to a bug in isFrameOffsetLegal we ended up with resolveFrameIndex creating
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; addresses with out-of-range displacements. Verify that this no longer happens.
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; CHECK-NOT: LD {{3276[8-9]}}
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; CHECK-NOT: LD {{327[7-9][0-9]}}
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; CHECK-NOT: LD {{32[8-9][0-9][0-9]}}
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; CHECK-NOT: LD {{3[3-9][0-9][0-9][0-9]}}
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; CHECK-NOT: LD {{[4-9][0-9][0-9][0-9][0-9]}}
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; CHECK-NOT: LD {{[1-9][0-9][0-9][0-9][0-9][0-9]+}}
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target datalayout = "e-m:e-i64:64-n32:64"
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target triple = "powerpc64le-unknown-linux-gnu"
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%struct.S2760 = type { <2 x float>, %struct.anon, i32, [28 x i8] }
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%struct.anon = type { [11 x %struct.anon.0], i64, [6 x { i64, i64 }], [24 x i8] }
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%struct.anon.0 = type { [30 x %union.U4DI], i8, [0 x i16], [30 x i8] }
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%union.U4DI = type { <4 x i64> }
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@s2760 = external global %struct.S2760
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@fails = external global i32
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define void @check2760(%struct.S2760* noalias sret %agg.result, %struct.S2760* byval align 16, %struct.S2760* %arg1, %struct.S2760* byval align 16) {
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entry:
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%arg0 = alloca %struct.S2760, align 32
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%arg2 = alloca %struct.S2760, align 32
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%arg1.addr = alloca %struct.S2760*, align 8
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%ret = alloca %struct.S2760, align 32
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%b1 = alloca %struct.S2760, align 32
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%b2 = alloca %struct.S2760, align 32
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%2 = bitcast %struct.S2760* %arg0 to i8*
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%3 = bitcast %struct.S2760* %0 to i8*
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* %2, i8* %3, i64 11104, i32 16, i1 false)
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%4 = bitcast %struct.S2760* %arg2 to i8*
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%5 = bitcast %struct.S2760* %1 to i8*
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* %4, i8* %5, i64 11104, i32 16, i1 false)
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store %struct.S2760* %arg1, %struct.S2760** %arg1.addr, align 8
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%6 = bitcast %struct.S2760* %ret to i8*
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call void @llvm.memset.p0i8.i64(i8* %6, i8 0, i64 11104, i32 32, i1 false)
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%7 = bitcast %struct.S2760* %b1 to i8*
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call void @llvm.memset.p0i8.i64(i8* %7, i8 0, i64 11104, i32 32, i1 false)
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%8 = bitcast %struct.S2760* %b2 to i8*
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call void @llvm.memset.p0i8.i64(i8* %8, i8 0, i64 11104, i32 32, i1 false)
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%b = getelementptr inbounds %struct.S2760* %arg0, i32 0, i32 1
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%g = getelementptr inbounds %struct.anon* %b, i32 0, i32 1
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%9 = load i64* %g, align 8
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%10 = load i64* getelementptr inbounds (%struct.S2760* @s2760, i32 0, i32 1, i32 1), align 8
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%cmp = icmp ne i64 %9, %10
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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%11 = load i32* @fails, align 4
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%inc = add nsw i32 %11, 1
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store i32 %inc, i32* @fails, align 4
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br label %if.end
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if.end: ; preds = %if.then, %entry
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%12 = load i64* getelementptr inbounds (%struct.S2760* @s2760, i32 0, i32 1, i32 1), align 8
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%b3 = getelementptr inbounds %struct.S2760* %ret, i32 0, i32 1
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%g4 = getelementptr inbounds %struct.anon* %b3, i32 0, i32 1
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store i64 %12, i64* %g4, align 8
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%13 = bitcast %struct.S2760* %agg.result to i8*
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%14 = bitcast %struct.S2760* %ret to i8*
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* %13, i8* %14, i64 11104, i32 32, i1 false)
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ret void
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}
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1)
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1)
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