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https://github.com/c64scene-ar/llvm-6502.git
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3d5cd01d37
after including the generated code from tablegen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206841 91177308-0d34-0410-b5e6-96231b3b80d8
85 lines
2.9 KiB
C++
85 lines
2.9 KiB
C++
//=====-- NVPTXSubtarget.h - Define Subtarget for the NVPTX ---*- C++ -*--====//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the NVPTX specific subclass of TargetSubtarget.
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//
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//===----------------------------------------------------------------------===//
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#ifndef NVPTXSUBTARGET_H
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#define NVPTXSUBTARGET_H
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#include "NVPTX.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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#include <string>
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#define GET_SUBTARGETINFO_HEADER
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#include "NVPTXGenSubtargetInfo.inc"
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namespace llvm {
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class NVPTXSubtarget : public NVPTXGenSubtargetInfo {
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virtual void anchor();
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std::string TargetName;
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NVPTX::DrvInterface drvInterface;
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bool Is64Bit;
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// PTX version x.y is represented as 10*x+y, e.g. 3.1 == 31
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unsigned PTXVersion;
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// SM version x.y is represented as 10*x+y, e.g. 3.1 == 31
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unsigned int SmVersion;
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public:
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/// This constructor initializes the data members to match that
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/// of the specified module.
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///
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NVPTXSubtarget(const std::string &TT, const std::string &CPU,
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const std::string &FS, bool is64Bit);
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bool hasBrkPt() const { return SmVersion >= 11; }
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bool hasAtomRedG32() const { return SmVersion >= 11; }
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bool hasAtomRedS32() const { return SmVersion >= 12; }
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bool hasAtomRedG64() const { return SmVersion >= 12; }
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bool hasAtomRedS64() const { return SmVersion >= 20; }
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bool hasAtomRedGen32() const { return SmVersion >= 20; }
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bool hasAtomRedGen64() const { return SmVersion >= 20; }
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bool hasAtomAddF32() const { return SmVersion >= 20; }
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bool hasVote() const { return SmVersion >= 12; }
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bool hasDouble() const { return SmVersion >= 13; }
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bool reqPTX20() const { return SmVersion >= 20; }
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bool hasF32FTZ() const { return SmVersion >= 20; }
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bool hasFMAF32() const { return SmVersion >= 20; }
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bool hasFMAF64() const { return SmVersion >= 13; }
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bool hasLDG() const { return SmVersion >= 32; }
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bool hasLDU() const { return SmVersion >= 20; }
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bool hasGenericLdSt() const { return SmVersion >= 20; }
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inline bool hasHWROT32() const { return false; }
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inline bool hasSWROT32() const { return true; }
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inline bool hasROT32() const { return hasHWROT32() || hasSWROT32(); }
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inline bool hasROT64() const { return SmVersion >= 20; }
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bool hasImageHandles() const {
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// Currently disabled
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return false;
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}
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bool is64Bit() const { return Is64Bit; }
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unsigned int getSmVersion() const { return SmVersion; }
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NVPTX::DrvInterface getDrvInterface() const { return drvInterface; }
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std::string getTargetName() const { return TargetName; }
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unsigned getPTXVersion() const { return PTXVersion; }
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void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
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};
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} // End llvm namespace
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#endif // NVPTXSUBTARGET_H
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