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c781a243a3
VirtRegMap keeps track of allocations so it knows what's not used. As a horrible hack, the stack coloring can color spill slots with *free* registers. That is, it replace reload and spills with copies from and to the free register. It unfold instructions that load and store the spill slot and replace them with register using variants. Not yet enabled. This is part 1. More coming. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70787 91177308-0d34-0410-b5e6-96231b3b80d8
111 lines
3.9 KiB
C++
111 lines
3.9 KiB
C++
//===-- LiveStackAnalysis.h - Live Stack Slot Analysis ----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the live stack slot analysis pass. It is analogous to
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// live interval analysis except it's analyzing liveness of stack slots rather
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// than registers.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_LIVESTACK_ANALYSIS_H
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#define LLVM_CODEGEN_LIVESTACK_ANALYSIS_H
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/LiveInterval.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Support/Allocator.h"
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#include <map>
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namespace llvm {
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class LiveStacks : public MachineFunctionPass {
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/// Special pool allocator for VNInfo's (LiveInterval val#).
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///
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BumpPtrAllocator VNInfoAllocator;
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/// S2IMap - Stack slot indices to live interval mapping.
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///
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typedef std::map<int, LiveInterval> SS2IntervalMap;
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SS2IntervalMap S2IMap;
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/// S2RCMap - Stack slot indices to register class mapping.
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std::map<int, const TargetRegisterClass*> S2RCMap;
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public:
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static char ID; // Pass identification, replacement for typeid
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LiveStacks() : MachineFunctionPass(&ID) {}
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typedef SS2IntervalMap::iterator iterator;
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typedef SS2IntervalMap::const_iterator const_iterator;
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const_iterator begin() const { return S2IMap.begin(); }
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const_iterator end() const { return S2IMap.end(); }
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iterator begin() { return S2IMap.begin(); }
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iterator end() { return S2IMap.end(); }
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unsigned getNumIntervals() const { return (unsigned)S2IMap.size(); }
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LiveInterval &getOrCreateInterval(int Slot, const TargetRegisterClass *RC) {
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assert(Slot >= 0 && "Spill slot indice must be >= 0");
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SS2IntervalMap::iterator I = S2IMap.find(Slot);
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if (I == S2IMap.end()) {
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I = S2IMap.insert(I,std::make_pair(Slot, LiveInterval(Slot,0.0F,true)));
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S2RCMap.insert(std::make_pair(Slot, RC));
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} else {
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// Use the largest common subclass register class.
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const TargetRegisterClass *OldRC = S2RCMap[Slot];
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S2RCMap[Slot] = getCommonSubClass(OldRC, RC);
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}
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return I->second;
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}
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LiveInterval &getInterval(int Slot) {
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assert(Slot >= 0 && "Spill slot indice must be >= 0");
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SS2IntervalMap::iterator I = S2IMap.find(Slot);
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assert(I != S2IMap.end() && "Interval does not exist for stack slot");
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return I->second;
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}
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const LiveInterval &getInterval(int Slot) const {
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assert(Slot >= 0 && "Spill slot indice must be >= 0");
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SS2IntervalMap::const_iterator I = S2IMap.find(Slot);
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assert(I != S2IMap.end() && "Interval does not exist for stack slot");
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return I->second;
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}
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bool hasInterval(int Slot) const {
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return S2IMap.count(Slot);
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}
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const TargetRegisterClass *getIntervalRegClass(int Slot) const {
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assert(Slot >= 0 && "Spill slot indice must be >= 0");
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std::map<int, const TargetRegisterClass*>::const_iterator
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I = S2RCMap.find(Slot);
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assert(I != S2RCMap.end() &&
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"Register class info does not exist for stack slot");
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return I->second;
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}
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BumpPtrAllocator& getVNInfoAllocator() { return VNInfoAllocator; }
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virtual void getAnalysisUsage(AnalysisUsage &AU) const;
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virtual void releaseMemory();
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/// runOnMachineFunction - pass entry point
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virtual bool runOnMachineFunction(MachineFunction&);
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/// print - Implement the dump method.
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virtual void print(std::ostream &O, const Module* = 0) const;
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void print(std::ostream *O, const Module* M = 0) const {
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if (O) print(*O, M);
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}
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};
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}
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#endif /* LLVM_CODEGEN_LIVESTACK_ANALYSIS_H */
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