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https://github.com/c64scene-ar/llvm-6502.git
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7b837d8c75
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
22 lines
827 B
LLVM
22 lines
827 B
LLVM
; RUN: llc < %s -mtriple=arm64-apple-darwin -enable-misched=false | FileCheck %s
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; rdar://12713765
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; Make sure we are not creating stack objects that are assumed to be 64-byte
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; aligned.
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@T3_retval = common global <16 x float> zeroinitializer, align 16
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define void @test(<16 x float>* noalias sret %agg.result) nounwind ssp {
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entry:
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; CHECK: test
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; CHECK: stp [[Q1:q[0-9]+]], [[Q2:q[0-9]+]], [sp, #32]
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; CHECK: stp [[Q1:q[0-9]+]], [[Q2:q[0-9]+]], [sp]
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; CHECK: stp [[Q1:q[0-9]+]], [[Q2:q[0-9]+]], {{\[}}[[BASE:x[0-9]+]], #32]
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; CHECK: stp [[Q1:q[0-9]+]], [[Q2:q[0-9]+]], {{\[}}[[BASE]]]
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%retval = alloca <16 x float>, align 16
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%0 = load <16 x float>* @T3_retval, align 16
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store <16 x float> %0, <16 x float>* %retval
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%1 = load <16 x float>* %retval
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store <16 x float> %1, <16 x float>* %agg.result, align 16
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ret void
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}
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