mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-22 07:32:48 +00:00
7b837d8c75
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
73 lines
3.3 KiB
LLVM
73 lines
3.3 KiB
LLVM
; RUN: llc -O1 -march=arm64 -enable-andcmp-sinking=true < %s | FileCheck %s
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; ModuleID = 'and-cbz-extr-mr.bc'
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32:64-S128"
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target triple = "arm64-apple-ios7.0.0"
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define zeroext i1 @foo(i1 %IsEditable, i1 %isTextField, i8* %str1, i8* %str2, i8* %str3, i8* %str4, i8* %str5, i8* %str6, i8* %str7, i8* %str8, i8* %str9, i8* %str10, i8* %str11, i8* %str12, i8* %str13, i32 %int1, i8* %str14) unnamed_addr #0 align 2 {
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; CHECK: _foo:
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entry:
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%tobool = icmp eq i8* %str14, null
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br i1 %tobool, label %return, label %if.end
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; CHECK: %if.end
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; CHECK: tbz
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if.end: ; preds = %entry
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%and.i.i.i = and i32 %int1, 4
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%tobool.i.i.i = icmp eq i32 %and.i.i.i, 0
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br i1 %tobool.i.i.i, label %if.end12, label %land.rhs.i
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land.rhs.i: ; preds = %if.end
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%cmp.i.i.i = icmp eq i8* %str12, %str13
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br i1 %cmp.i.i.i, label %if.then3, label %lor.rhs.i.i.i
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lor.rhs.i.i.i: ; preds = %land.rhs.i
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%cmp.i13.i.i.i = icmp eq i8* %str10, %str11
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br i1 %cmp.i13.i.i.i, label %_ZNK7WebCore4Node10hasTagNameERKNS_13QualifiedNameE.exit, label %if.end5
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_ZNK7WebCore4Node10hasTagNameERKNS_13QualifiedNameE.exit: ; preds = %lor.rhs.i.i.i
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%cmp.i.i.i.i = icmp eq i8* %str8, %str9
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br i1 %cmp.i.i.i.i, label %if.then3, label %if.end5
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if.then3: ; preds = %_ZNK7WebCore4Node10hasTagNameERKNS_13QualifiedNameE.exit, %land.rhs.i
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%tmp11 = load i8* %str14, align 8
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%tmp12 = and i8 %tmp11, 2
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%tmp13 = icmp ne i8 %tmp12, 0
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br label %return
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if.end5: ; preds = %_ZNK7WebCore4Node10hasTagNameERKNS_13QualifiedNameE.exit, %lor.rhs.i.i.i
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; CHECK: %if.end5
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; CHECK: tbz
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br i1 %tobool.i.i.i, label %if.end12, label %land.rhs.i19
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land.rhs.i19: ; preds = %if.end5
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%cmp.i.i.i18 = icmp eq i8* %str6, %str7
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br i1 %cmp.i.i.i18, label %if.then7, label %lor.rhs.i.i.i23
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lor.rhs.i.i.i23: ; preds = %land.rhs.i19
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%cmp.i13.i.i.i22 = icmp eq i8* %str3, %str4
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br i1 %cmp.i13.i.i.i22, label %_ZNK7WebCore4Node10hasTagNameERKNS_13QualifiedNameE.exit28, label %if.end12
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_ZNK7WebCore4Node10hasTagNameERKNS_13QualifiedNameE.exit28: ; preds = %lor.rhs.i.i.i23
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%cmp.i.i.i.i26 = icmp eq i8* %str1, %str2
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br i1 %cmp.i.i.i.i26, label %if.then7, label %if.end12
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if.then7: ; preds = %_ZNK7WebCore4Node10hasTagNameERKNS_13QualifiedNameE.exit28, %land.rhs.i19
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br i1 %isTextField, label %if.then9, label %if.end12
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if.then9: ; preds = %if.then7
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%tmp23 = load i8* %str5, align 8
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%tmp24 = and i8 %tmp23, 2
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%tmp25 = icmp ne i8 %tmp24, 0
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br label %return
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if.end12: ; preds = %if.then7, %_ZNK7WebCore4Node10hasTagNameERKNS_13QualifiedNameE.exit28, %lor.rhs.i.i.i23, %if.end5, %if.end
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%lnot = xor i1 %IsEditable, true
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br label %return
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return: ; preds = %if.end12, %if.then9, %if.then3, %entry
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%retval.0 = phi i1 [ %tmp13, %if.then3 ], [ %tmp25, %if.then9 ], [ %lnot, %if.end12 ], [ true, %entry ]
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ret i1 %retval.0
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}
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attributes #0 = { nounwind ssp }
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