llvm-6502/test/Analysis/CostModel/ARM64/store.ll
Tim Northover 7b837d8c75 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00

23 lines
922 B
LLVM

; RUN: opt < %s -cost-model -analyze -mtriple=arm64-apple-ios -mcpu=cyclone | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
; CHECK-LABEL: store
define void @store() {
; Stores of <2 x i64> should be expensive because we don't split them and
; and unaligned 16b stores have bad performance.
; CHECK: cost of 12 {{.*}} store
store <2 x i64> undef, <2 x i64> * undef
; We scalarize the loads/stores because there is no vector register name for
; these types (they get extended to v.4h/v.2s).
; CHECK: cost of 16 {{.*}} store
store <2 x i8> undef, <2 x i8> * undef
; CHECK: cost of 64 {{.*}} store
store <4 x i8> undef, <4 x i8> * undef
; CHECK: cost of 16 {{.*}} load
load <2 x i8> * undef
; CHECK: cost of 64 {{.*}} load
load <4 x i8> * undef
ret void
}