Jakob Stoklund Olesen 4a0a18af4a Permit remat of partial register defs when it is safe. ... An instruction may define part of a register where the other bits are undefined. In that case, it is safe to rematerialize the instruction. For example: %vreg2:ssub_0<def> = VLDRS <cp#0>, 0, pred:14, pred:%noreg, %vreg2<imp-def> The extra <imp-def> operand indicates that the instruction does not read the other parts of the virtual register, so a remat is safe. This patch simply allows multiple def operands for the virtual register. It is MI->readsVirtualRegister() that determines if we depend on a previous value so remat is impossible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138953 91177308-0d34-0410-b5e6-96231b3b80d8		2011-09-01 18:27:51 +00:00
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Analysis	After r138010, subroutine type does not have context info. Update type verifier accordingly.	2011-08-31 18:04:31 +00:00
Archive
AsmParser	Auto upgrade the old EH scheme to use the new one. This is on a trial basis. If	2011-08-27 06:11:03 +00:00
Bitcode	Don't forget to add the landingpad and resume instructions to the InstructionList.	2011-09-01 00:50:20 +00:00
CodeGen	Permit remat of partial register defs when it is safe.	2011-09-01 18:27:51 +00:00
CompilerDriver
ExecutionEngine	Move TargetRegistry and TargetSelect from Target to Support where they belong.	2011-08-24 18:08:43 +00:00
Linker
MC	Fix up r137380 based on post-commit review by Jim Grosbach.	2011-09-01 18:02:14 +00:00
Object	Teach macho-dump to dump the uleb128s referred to by linkedit_data segments.	2011-08-30 22:10:58 +00:00
Support	Add AMDIL as valid target triple to LLVM.	2011-08-29 15:44:55 +00:00
Target	ARM 'rscs' mnemonic is carry-setting 'rsc', not 'rs' with a 'cs' condition code.	2011-09-01 18:22:13 +00:00
Transforms	Resubmit with fix. Properly remove the instructions except for landingpad, which should be removed only when its invokes are.	2011-09-01 01:28:11 +00:00
VMCore	Fixes following the CR by Chris and Duncan:	2011-08-29 19:58:36 +00:00
CMakeLists.txt
Makefile