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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78827 91177308-0d34-0410-b5e6-96231b3b80d8
146 lines
5.1 KiB
C++
146 lines
5.1 KiB
C++
//===-- llvm/Target/TargetInstrItineraries.h - Scheduling -------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes the structures used for instruction itineraries and
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// stages. This is used by schedulers to determine instruction stages and
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// latencies.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_TARGETINSTRITINERARIES_H
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#define LLVM_TARGET_TARGETINSTRITINERARIES_H
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#include <algorithm>
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namespace llvm {
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//===----------------------------------------------------------------------===//
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/// Instruction stage - These values represent a non-pipelined step in
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/// the execution of an instruction. Cycles represents the number of
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/// discrete time slots needed to complete the stage. Units represent
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/// the choice of functional units that can be used to complete the
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/// stage. Eg. IntUnit1, IntUnit2. NextCycles indicates how many
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/// cycles should elapse from the start of this stage to the start of
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/// the next stage in the itinerary. A value of -1 indicates that the
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/// next stage should start immediately after the current one.
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/// For example:
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///
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/// { 1, x, -1 }
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/// indicates that the stage occupies FU x for 1 cycle and that
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/// the next stage starts immediately after this one.
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///
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/// { 2, x|y, 1 }
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/// indicates that the stage occupies either FU x or FU y for 2
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/// consecuative cycles and that the next stage starts one cycle
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/// after this stage starts. That is, the stage requirements
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/// overlap in time.
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///
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/// { 1, x, 0 }
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/// indicates that the stage occupies FU x for 1 cycle and that
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/// the next stage starts in this same cycle. This can be used to
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/// indicate that the instruction requires multiple stages at the
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/// same time.
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///
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struct InstrStage {
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unsigned Cycles_; ///< Length of stage in machine cycles
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unsigned Units_; ///< Choice of functional units
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int NextCycles_; ///< Number of machine cycles to next stage
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/// getCycles - returns the number of cycles the stage is occupied
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unsigned getCycles() const {
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return Cycles_;
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}
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/// getUnits - returns the choice of FUs
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unsigned getUnits() const {
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return Units_;
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}
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/// getNextCycles - returns the number of cycles from the start of
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/// this stage to the start of the next stage in the itinerary
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unsigned getNextCycles() const {
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return (NextCycles_ >= 0) ? (unsigned)NextCycles_ : Cycles_;
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}
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};
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//===----------------------------------------------------------------------===//
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/// Instruction itinerary - An itinerary represents a sequential series of steps
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/// required to complete an instruction. Itineraries are represented as
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/// sequences of instruction stages.
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///
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struct InstrItinerary {
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unsigned First; ///< Index of first stage in itinerary
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unsigned Last; ///< Index of last + 1 stage in itinerary
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};
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//===----------------------------------------------------------------------===//
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/// Instruction itinerary Data - Itinerary data supplied by a subtarget to be
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/// used by a target.
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///
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struct InstrItineraryData {
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const InstrStage *Stages; ///< Array of stages selected
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const InstrItinerary *Itineratries; ///< Array of itineraries selected
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/// Ctors.
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///
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InstrItineraryData() : Stages(0), Itineratries(0) {}
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InstrItineraryData(const InstrStage *S, const InstrItinerary *I)
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: Stages(S), Itineratries(I) {}
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/// isEmpty - Returns true if there are no itineraries.
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///
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bool isEmpty() const { return Itineratries == 0; }
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/// begin - Return the first stage of the itinerary.
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///
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const InstrStage *begin(unsigned ItinClassIndx) const {
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unsigned StageIdx = Itineratries[ItinClassIndx].First;
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return Stages + StageIdx;
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}
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/// end - Return the last+1 stage of the itinerary.
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///
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const InstrStage *end(unsigned ItinClassIndx) const {
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unsigned StageIdx = Itineratries[ItinClassIndx].Last;
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return Stages + StageIdx;
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}
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/// getLatency - Return the scheduling latency of the given class. A
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/// simple latency value for an instruction is an over-simplification
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/// for some architectures, but it's a reasonable first approximation.
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///
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unsigned getLatency(unsigned ItinClassIndx) const {
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// If the target doesn't provide latency information, use a simple
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// non-zero default value for all instructions.
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if (isEmpty())
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return 1;
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// Caclulate the maximum completion time for any stage. The
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// assumption is that all inputs are consumed at the start of the
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// first stage and that all outputs are produced at the end of the
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// latest completing last stage.
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unsigned Latency = 0, StartCycle = 0;
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for (const InstrStage *IS = begin(ItinClassIndx), *E = end(ItinClassIndx);
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IS != E; ++IS) {
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Latency = std::max(Latency, StartCycle + IS->getCycles());
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StartCycle += IS->getNextCycles();
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}
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return Latency;
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}
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};
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} // End llvm namespace
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#endif
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