mirror of
https://github.com/c64scene-ar/llvm-6502.git
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29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
258 lines
11 KiB
C++
258 lines
11 KiB
C++
//===-- AArch64ELFObjectWriter.cpp - AArch64 ELF Writer -------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file handles ELF-specific object emission, converting LLVM's internal
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// fixups into the appropriate relocations.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/AArch64FixupKinds.h"
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#include "MCTargetDesc/AArch64MCExpr.h"
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#include "MCTargetDesc/AArch64MCTargetDesc.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/ErrorHandling.h"
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using namespace llvm;
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namespace {
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class AArch64ELFObjectWriter : public MCELFObjectTargetWriter {
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public:
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AArch64ELFObjectWriter(uint8_t OSABI, bool IsLittleEndian);
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virtual ~AArch64ELFObjectWriter();
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protected:
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unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,
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bool IsPCRel) const override;
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private:
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};
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}
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AArch64ELFObjectWriter::AArch64ELFObjectWriter(uint8_t OSABI,
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bool IsLittleEndian)
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: MCELFObjectTargetWriter(/*Is64Bit*/ true, OSABI, ELF::EM_AARCH64,
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/*HasRelocationAddend*/ true) {}
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AArch64ELFObjectWriter::~AArch64ELFObjectWriter() {}
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unsigned AArch64ELFObjectWriter::GetRelocType(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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AArch64MCExpr::VariantKind RefKind =
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static_cast<AArch64MCExpr::VariantKind>(Target.getRefKind());
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AArch64MCExpr::VariantKind SymLoc = AArch64MCExpr::getSymbolLoc(RefKind);
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bool IsNC = AArch64MCExpr::isNotChecked(RefKind);
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assert((!Target.getSymA() ||
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Target.getSymA()->getKind() == MCSymbolRefExpr::VK_None) &&
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"Should only be expression-level modifiers here");
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assert((!Target.getSymB() ||
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Target.getSymB()->getKind() == MCSymbolRefExpr::VK_None) &&
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"Should only be expression-level modifiers here");
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if (IsPCRel) {
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switch ((unsigned)Fixup.getKind()) {
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case FK_Data_2:
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return ELF::R_AARCH64_PREL16;
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case FK_Data_4:
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return ELF::R_AARCH64_PREL32;
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case FK_Data_8:
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return ELF::R_AARCH64_PREL64;
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case AArch64::fixup_aarch64_pcrel_adr_imm21:
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assert(SymLoc == AArch64MCExpr::VK_NONE && "unexpected ADR relocation");
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return ELF::R_AARCH64_ADR_PREL_LO21;
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case AArch64::fixup_aarch64_pcrel_adrp_imm21:
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if (SymLoc == AArch64MCExpr::VK_ABS && !IsNC)
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return ELF::R_AARCH64_ADR_PREL_PG_HI21;
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if (SymLoc == AArch64MCExpr::VK_GOT && !IsNC)
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return ELF::R_AARCH64_ADR_GOT_PAGE;
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if (SymLoc == AArch64MCExpr::VK_GOTTPREL && !IsNC)
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return ELF::R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21;
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if (SymLoc == AArch64MCExpr::VK_TLSDESC && !IsNC)
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return ELF::R_AARCH64_TLSDESC_ADR_PAGE;
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llvm_unreachable("invalid symbol kind for ADRP relocation");
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case AArch64::fixup_aarch64_pcrel_branch26:
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return ELF::R_AARCH64_JUMP26;
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case AArch64::fixup_aarch64_pcrel_call26:
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return ELF::R_AARCH64_CALL26;
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case AArch64::fixup_aarch64_ldr_pcrel_imm19:
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if (SymLoc == AArch64MCExpr::VK_GOTTPREL)
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return ELF::R_AARCH64_TLSIE_LD_GOTTPREL_PREL19;
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return ELF::R_AARCH64_LD_PREL_LO19;
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case AArch64::fixup_aarch64_pcrel_branch14:
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return ELF::R_AARCH64_TSTBR14;
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case AArch64::fixup_aarch64_pcrel_branch19:
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return ELF::R_AARCH64_CONDBR19;
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default:
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llvm_unreachable("Unsupported pc-relative fixup kind");
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}
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} else {
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switch ((unsigned)Fixup.getKind()) {
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case FK_Data_2:
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return ELF::R_AARCH64_ABS16;
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case FK_Data_4:
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return ELF::R_AARCH64_ABS32;
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case FK_Data_8:
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return ELF::R_AARCH64_ABS64;
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case AArch64::fixup_aarch64_add_imm12:
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if (RefKind == AArch64MCExpr::VK_DTPREL_HI12)
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return ELF::R_AARCH64_TLSLD_ADD_DTPREL_HI12;
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if (RefKind == AArch64MCExpr::VK_TPREL_HI12)
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return ELF::R_AARCH64_TLSLE_ADD_TPREL_HI12;
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if (RefKind == AArch64MCExpr::VK_DTPREL_LO12_NC)
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return ELF::R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC;
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if (RefKind == AArch64MCExpr::VK_DTPREL_LO12)
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return ELF::R_AARCH64_TLSLD_ADD_DTPREL_LO12;
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if (RefKind == AArch64MCExpr::VK_TPREL_LO12_NC)
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return ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC;
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if (RefKind == AArch64MCExpr::VK_TPREL_LO12)
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return ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12;
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if (RefKind == AArch64MCExpr::VK_TLSDESC_LO12)
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return ELF::R_AARCH64_TLSDESC_ADD_LO12_NC;
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if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
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return ELF::R_AARCH64_ADD_ABS_LO12_NC;
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report_fatal_error("invalid fixup for add (uimm12) instruction");
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return 0;
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case AArch64::fixup_aarch64_ldst_imm12_scale1:
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if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
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return ELF::R_AARCH64_LDST8_ABS_LO12_NC;
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if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
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return ELF::R_AARCH64_TLSLD_LDST8_DTPREL_LO12;
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if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC)
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return ELF::R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC;
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if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC)
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return ELF::R_AARCH64_TLSLE_LDST8_TPREL_LO12;
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if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
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return ELF::R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC;
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report_fatal_error("invalid fixup for 8-bit load/store instruction");
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return 0;
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case AArch64::fixup_aarch64_ldst_imm12_scale2:
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if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
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return ELF::R_AARCH64_LDST16_ABS_LO12_NC;
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if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
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return ELF::R_AARCH64_TLSLD_LDST16_DTPREL_LO12;
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if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC)
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return ELF::R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC;
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if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC)
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return ELF::R_AARCH64_TLSLE_LDST16_TPREL_LO12;
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if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
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return ELF::R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC;
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report_fatal_error("invalid fixup for 16-bit load/store instruction");
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return 0;
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case AArch64::fixup_aarch64_ldst_imm12_scale4:
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if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
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return ELF::R_AARCH64_LDST32_ABS_LO12_NC;
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if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
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return ELF::R_AARCH64_TLSLD_LDST32_DTPREL_LO12;
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if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC)
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return ELF::R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC;
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if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC)
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return ELF::R_AARCH64_TLSLE_LDST32_TPREL_LO12;
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if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
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return ELF::R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC;
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report_fatal_error("invalid fixup for 32-bit load/store instruction");
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return 0;
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case AArch64::fixup_aarch64_ldst_imm12_scale8:
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if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
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return ELF::R_AARCH64_LDST64_ABS_LO12_NC;
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if (SymLoc == AArch64MCExpr::VK_GOT && IsNC)
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return ELF::R_AARCH64_LD64_GOT_LO12_NC;
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if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
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return ELF::R_AARCH64_TLSLD_LDST64_DTPREL_LO12;
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if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC)
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return ELF::R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC;
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if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC)
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return ELF::R_AARCH64_TLSLE_LDST64_TPREL_LO12;
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if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
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return ELF::R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC;
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if (SymLoc == AArch64MCExpr::VK_GOTTPREL && IsNC)
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return ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC;
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if (SymLoc == AArch64MCExpr::VK_TLSDESC && IsNC)
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return ELF::R_AARCH64_TLSDESC_LD64_LO12_NC;
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report_fatal_error("invalid fixup for 64-bit load/store instruction");
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return 0;
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case AArch64::fixup_aarch64_ldst_imm12_scale16:
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if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
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return ELF::R_AARCH64_LDST128_ABS_LO12_NC;
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report_fatal_error("invalid fixup for 128-bit load/store instruction");
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return 0;
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case AArch64::fixup_aarch64_movw:
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if (RefKind == AArch64MCExpr::VK_ABS_G3)
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return ELF::R_AARCH64_MOVW_UABS_G3;
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if (RefKind == AArch64MCExpr::VK_ABS_G2)
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return ELF::R_AARCH64_MOVW_UABS_G2;
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if (RefKind == AArch64MCExpr::VK_ABS_G2_S)
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return ELF::R_AARCH64_MOVW_SABS_G2;
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if (RefKind == AArch64MCExpr::VK_ABS_G2_NC)
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return ELF::R_AARCH64_MOVW_UABS_G2_NC;
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if (RefKind == AArch64MCExpr::VK_ABS_G1)
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return ELF::R_AARCH64_MOVW_UABS_G1;
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if (RefKind == AArch64MCExpr::VK_ABS_G1_S)
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return ELF::R_AARCH64_MOVW_SABS_G1;
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if (RefKind == AArch64MCExpr::VK_ABS_G1_NC)
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return ELF::R_AARCH64_MOVW_UABS_G1_NC;
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if (RefKind == AArch64MCExpr::VK_ABS_G0)
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return ELF::R_AARCH64_MOVW_UABS_G0;
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if (RefKind == AArch64MCExpr::VK_ABS_G0_S)
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return ELF::R_AARCH64_MOVW_SABS_G0;
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if (RefKind == AArch64MCExpr::VK_ABS_G0_NC)
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return ELF::R_AARCH64_MOVW_UABS_G0_NC;
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if (RefKind == AArch64MCExpr::VK_DTPREL_G2)
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return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G2;
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if (RefKind == AArch64MCExpr::VK_DTPREL_G1)
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return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G1;
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if (RefKind == AArch64MCExpr::VK_DTPREL_G1_NC)
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return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC;
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if (RefKind == AArch64MCExpr::VK_DTPREL_G0)
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return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G0;
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if (RefKind == AArch64MCExpr::VK_DTPREL_G0_NC)
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return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC;
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if (RefKind == AArch64MCExpr::VK_TPREL_G2)
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return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G2;
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if (RefKind == AArch64MCExpr::VK_TPREL_G1)
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return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G1;
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if (RefKind == AArch64MCExpr::VK_TPREL_G1_NC)
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return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G1_NC;
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if (RefKind == AArch64MCExpr::VK_TPREL_G0)
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return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G0;
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if (RefKind == AArch64MCExpr::VK_TPREL_G0_NC)
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return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G0_NC;
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if (RefKind == AArch64MCExpr::VK_GOTTPREL_G1)
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return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G1;
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if (RefKind == AArch64MCExpr::VK_GOTTPREL_G0_NC)
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return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC;
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report_fatal_error("invalid fixup for movz/movk instruction");
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return 0;
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case AArch64::fixup_aarch64_tlsdesc_call:
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return ELF::R_AARCH64_TLSDESC_CALL;
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default:
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llvm_unreachable("Unknown ELF relocation type");
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}
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}
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llvm_unreachable("Unimplemented fixup -> relocation");
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}
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MCObjectWriter *llvm::createAArch64ELFObjectWriter(raw_ostream &OS,
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uint8_t OSABI,
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bool IsLittleEndian) {
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MCELFObjectTargetWriter *MOTW =
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new AArch64ELFObjectWriter(OSABI, IsLittleEndian);
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return createELFObjectWriter(MOTW, OS, IsLittleEndian);
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}
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