mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-01 15:11:24 +00:00
ff0a883fe9
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90049 91177308-0d34-0410-b5e6-96231b3b80d8
365 lines
8.9 KiB
LLVM
365 lines
8.9 KiB
LLVM
; RUN: opt < %s -gvn -enable-load-pre -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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define i32 @test1(i32* %p, i1 %C) {
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; CHECK: @test1
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block1:
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br i1 %C, label %block2, label %block3
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block2:
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br label %block4
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; CHECK: block2:
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; CHECK-NEXT: load i32* %p
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block3:
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store i32 0, i32* %p
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br label %block4
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block4:
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%PRE = load i32* %p
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ret i32 %PRE
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; CHECK: block4:
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; CHECK-NEXT: phi i32
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; CHECK-NEXT: ret i32
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}
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; This is a simple phi translation case.
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define i32 @test2(i32* %p, i32* %q, i1 %C) {
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; CHECK: @test2
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block1:
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br i1 %C, label %block2, label %block3
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block2:
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br label %block4
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; CHECK: block2:
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; CHECK-NEXT: load i32* %q
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block3:
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store i32 0, i32* %p
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br label %block4
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block4:
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%P2 = phi i32* [%p, %block3], [%q, %block2]
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%PRE = load i32* %P2
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ret i32 %PRE
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; CHECK: block4:
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; CHECK-NEXT: phi i32 [
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; CHECK-NOT: load
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; CHECK: ret i32
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}
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; This is a PRE case that requires phi translation through a GEP.
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define i32 @test3(i32* %p, i32* %q, i32** %Hack, i1 %C) {
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; CHECK: @test3
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block1:
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%B = getelementptr i32* %q, i32 1
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store i32* %B, i32** %Hack
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br i1 %C, label %block2, label %block3
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block2:
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br label %block4
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; CHECK: block2:
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; CHECK-NEXT: load i32* %B
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block3:
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%A = getelementptr i32* %p, i32 1
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store i32 0, i32* %A
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br label %block4
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block4:
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%P2 = phi i32* [%p, %block3], [%q, %block2]
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%P3 = getelementptr i32* %P2, i32 1
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%PRE = load i32* %P3
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ret i32 %PRE
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; CHECK: block4:
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; CHECK-NEXT: phi i32 [
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; CHECK-NOT: load
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; CHECK: ret i32
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}
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;; Here the loaded address is available, but the computation is in 'block3'
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;; which does not dominate 'block2'.
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define i32 @test4(i32* %p, i32* %q, i32** %Hack, i1 %C) {
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; CHECK: @test4
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block1:
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br i1 %C, label %block2, label %block3
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block2:
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br label %block4
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; CHECK: block2:
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; CHECK: load i32*
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; CHECK: br label %block4
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block3:
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%B = getelementptr i32* %q, i32 1
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store i32* %B, i32** %Hack
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%A = getelementptr i32* %p, i32 1
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store i32 0, i32* %A
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br label %block4
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block4:
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%P2 = phi i32* [%p, %block3], [%q, %block2]
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%P3 = getelementptr i32* %P2, i32 1
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%PRE = load i32* %P3
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ret i32 %PRE
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; CHECK: block4:
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; CHECK-NEXT: phi i32 [
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; CHECK-NOT: load
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; CHECK: ret i32
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}
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;void test5(int N, double *G) {
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; int j;
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; for (j = 0; j < N - 1; j++)
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; G[j] = G[j] + G[j+1];
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;}
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define void @test5(i32 %N, double* nocapture %G) nounwind ssp {
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; CHECK: @test5
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entry:
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%0 = add i32 %N, -1
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%1 = icmp sgt i32 %0, 0
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br i1 %1, label %bb.nph, label %return
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bb.nph:
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%tmp = zext i32 %0 to i64
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br label %bb
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; CHECK: bb.nph:
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; CHECK: load double*
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; CHECK: br label %bb
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bb:
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%indvar = phi i64 [ 0, %bb.nph ], [ %tmp6, %bb ]
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%tmp6 = add i64 %indvar, 1
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%scevgep = getelementptr double* %G, i64 %tmp6
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%scevgep7 = getelementptr double* %G, i64 %indvar
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%2 = load double* %scevgep7, align 8
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%3 = load double* %scevgep, align 8
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%4 = fadd double %2, %3
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store double %4, double* %scevgep7, align 8
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%exitcond = icmp eq i64 %tmp6, %tmp
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br i1 %exitcond, label %return, label %bb
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; Should only be one load in the loop.
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; CHECK: bb:
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; CHECK: load double*
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; CHECK-NOT: load double*
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; CHECK: br i1 %exitcond
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return:
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ret void
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}
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;void test6(int N, double *G) {
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; int j;
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; for (j = 0; j < N - 1; j++)
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; G[j+1] = G[j] + G[j+1];
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;}
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define void @test6(i32 %N, double* nocapture %G) nounwind ssp {
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; CHECK: @test6
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entry:
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%0 = add i32 %N, -1
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%1 = icmp sgt i32 %0, 0
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br i1 %1, label %bb.nph, label %return
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bb.nph:
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%tmp = zext i32 %0 to i64
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br label %bb
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; CHECK: bb.nph:
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; CHECK: load double*
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; CHECK: br label %bb
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bb:
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%indvar = phi i64 [ 0, %bb.nph ], [ %tmp6, %bb ]
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%tmp6 = add i64 %indvar, 1
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%scevgep = getelementptr double* %G, i64 %tmp6
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%scevgep7 = getelementptr double* %G, i64 %indvar
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%2 = load double* %scevgep7, align 8
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%3 = load double* %scevgep, align 8
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%4 = fadd double %2, %3
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store double %4, double* %scevgep, align 8
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%exitcond = icmp eq i64 %tmp6, %tmp
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br i1 %exitcond, label %return, label %bb
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; Should only be one load in the loop.
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; CHECK: bb:
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; CHECK: load double*
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; CHECK-NOT: load double*
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; CHECK: br i1 %exitcond
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return:
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ret void
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}
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;void test7(int N, double* G) {
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; long j;
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; G[1] = 1;
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; for (j = 1; j < N - 1; j++)
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; G[j+1] = G[j] + G[j+1];
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;}
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; This requires phi translation of the adds.
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define void @test7(i32 %N, double* nocapture %G) nounwind ssp {
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entry:
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%0 = getelementptr inbounds double* %G, i64 1
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store double 1.000000e+00, double* %0, align 8
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%1 = add i32 %N, -1
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%2 = icmp sgt i32 %1, 1
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br i1 %2, label %bb.nph, label %return
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bb.nph:
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%tmp = sext i32 %1 to i64
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%tmp7 = add i64 %tmp, -1
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br label %bb
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bb:
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%indvar = phi i64 [ 0, %bb.nph ], [ %tmp9, %bb ]
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%tmp8 = add i64 %indvar, 2
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%scevgep = getelementptr double* %G, i64 %tmp8
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%tmp9 = add i64 %indvar, 1
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%scevgep10 = getelementptr double* %G, i64 %tmp9
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%3 = load double* %scevgep10, align 8
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%4 = load double* %scevgep, align 8
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%5 = fadd double %3, %4
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store double %5, double* %scevgep, align 8
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%exitcond = icmp eq i64 %tmp9, %tmp7
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br i1 %exitcond, label %return, label %bb
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; Should only be one load in the loop.
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; CHECK: bb:
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; CHECK: load double*
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; CHECK-NOT: load double*
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; CHECK: br i1 %exitcond
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return:
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ret void
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}
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;; Here the loaded address isn't available in 'block2' at all, requiring a new
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;; GEP to be inserted into it.
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define i32 @test8(i32* %p, i32* %q, i32** %Hack, i1 %C) {
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; CHECK: @test8
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block1:
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br i1 %C, label %block2, label %block3
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block2:
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br label %block4
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; CHECK: block2:
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; CHECK: load i32*
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; CHECK: br label %block4
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block3:
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%A = getelementptr i32* %p, i32 1
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store i32 0, i32* %A
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br label %block4
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block4:
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%P2 = phi i32* [%p, %block3], [%q, %block2]
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%P3 = getelementptr i32* %P2, i32 1
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%PRE = load i32* %P3
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ret i32 %PRE
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; CHECK: block4:
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; CHECK-NEXT: phi i32 [
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; CHECK-NOT: load
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; CHECK: ret i32
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}
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;void test9(int N, double* G) {
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; long j;
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; for (j = 1; j < N - 1; j++)
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; G[j+1] = G[j] + G[j+1];
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;}
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; This requires phi translation of the adds.
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define void @test9(i32 %N, double* nocapture %G) nounwind ssp {
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entry:
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add i32 0, 0
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%1 = add i32 %N, -1
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%2 = icmp sgt i32 %1, 1
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br i1 %2, label %bb.nph, label %return
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bb.nph:
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%tmp = sext i32 %1 to i64
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%tmp7 = add i64 %tmp, -1
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br label %bb
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; CHECK: bb.nph:
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; CHECK: load double*
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; CHECK: br label %bb
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bb:
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%indvar = phi i64 [ 0, %bb.nph ], [ %tmp9, %bb ]
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%tmp8 = add i64 %indvar, 2
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%scevgep = getelementptr double* %G, i64 %tmp8
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%tmp9 = add i64 %indvar, 1
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%scevgep10 = getelementptr double* %G, i64 %tmp9
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%3 = load double* %scevgep10, align 8
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%4 = load double* %scevgep, align 8
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%5 = fadd double %3, %4
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store double %5, double* %scevgep, align 8
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%exitcond = icmp eq i64 %tmp9, %tmp7
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br i1 %exitcond, label %return, label %bb
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; Should only be one load in the loop.
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; CHECK: bb:
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; CHECK: load double*
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; CHECK-NOT: load double*
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; CHECK: br i1 %exitcond
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return:
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ret void
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}
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;void test10(int N, double* G) {
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; long j;
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; for (j = 1; j < N - 1; j++)
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; G[j] = G[j] + G[j+1] + G[j-1];
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;}
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; PR5501
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define void @test10(i32 %N, double* nocapture %G) nounwind ssp {
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entry:
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%0 = add i32 %N, -1
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%1 = icmp sgt i32 %0, 1
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br i1 %1, label %bb.nph, label %return
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bb.nph:
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%tmp = sext i32 %0 to i64
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%tmp8 = add i64 %tmp, -1
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br label %bb
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; CHECK: bb.nph:
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; CHECK: load double*
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; CHECK: load double*
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; CHECK: br label %bb
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bb:
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%indvar = phi i64 [ 0, %bb.nph ], [ %tmp11, %bb ]
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%scevgep = getelementptr double* %G, i64 %indvar
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%tmp9 = add i64 %indvar, 2
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%scevgep10 = getelementptr double* %G, i64 %tmp9
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%tmp11 = add i64 %indvar, 1
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%scevgep12 = getelementptr double* %G, i64 %tmp11
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%2 = load double* %scevgep12, align 8
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%3 = load double* %scevgep10, align 8
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%4 = fadd double %2, %3
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%5 = load double* %scevgep, align 8
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%6 = fadd double %4, %5
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store double %6, double* %scevgep12, align 8
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%exitcond = icmp eq i64 %tmp11, %tmp8
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br i1 %exitcond, label %return, label %bb
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; Should only be one load in the loop.
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; CHECK: bb:
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; CHECK: load double*
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; CHECK-NOT: load double*
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; CHECK: br i1 %exitcond
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return:
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ret void
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}
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