Jim Grosbach 4af58f145d ARM64: [su]xtw use W regs as inputs, not X regs. ... Update the SXT[BHW]/UXTW instruction aliases and the shifted reg addressing mode handling. PR19455 and rdar://16650642 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206495 91177308-0d34-0410-b5e6-96231b3b80d8		2014-04-17 20:47:31 +00:00
..
AArch64	AArch64/ARM64: port some NEON tests to ARM64	2014-04-16 15:28:02 +00:00
ARM	Make FastISel::SelectInstruction return before target specific fast-isel code	2014-04-15 21:30:06 +00:00
ARM64	ARM64: [su]xtw use W regs as inputs, not X regs.	2014-04-17 20:47:31 +00:00
CPP
Generic
Hexagon
Inputs
Mips	[mips] Add initial support for NaN2008 in the back-end.	2014-04-16 15:48:55 +00:00
MSP430
NVPTX
PowerPC	[PowerPC] Fix rlwimi isel when mask is not constant	2014-04-13 17:10:58 +00:00
R600	R600/SI: f64 frint is legal on CI	2014-04-17 17:06:37 +00:00
SPARC
SystemZ	Reenable use of TBAA during CodeGen	2014-04-12 01:26:00 +00:00
Thumb	Make this test not match its own filename, when being run from a path that includes the string 'add'.	2014-04-15 22:29:32 +00:00
Thumb2	Move the segmented stack switch to a function attribute	2014-04-10 22:58:43 +00:00
X86	[stack protector] Make the StackProtector pass respect ssp-buffer-size.	2014-04-17 19:08:36 +00:00
XCore	[XCore] Don't create invalid MKMSK instructions inside loadImmediate().	2014-04-14 12:30:35 +00:00