mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
56077f5796
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218776 91177308-0d34-0410-b5e6-96231b3b80d8
245 lines
7.1 KiB
LLVM
245 lines
7.1 KiB
LLVM
; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}udiv24_i8:
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; SI: V_CVT_F32_UBYTE
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; SI: V_CVT_F32_UBYTE
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; SI: V_RCP_F32
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; SI: V_CVT_U32_F32
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; EG: UINT_TO_FLT
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; EG-DAG: UINT_TO_FLT
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; EG-DAG: RECIP_IEEE
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; EG: FLT_TO_UINT
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define void @udiv24_i8(i8 addrspace(1)* %out, i8 addrspace(1)* %in) {
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%den_ptr = getelementptr i8 addrspace(1)* %in, i8 1
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%num = load i8 addrspace(1) * %in
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%den = load i8 addrspace(1) * %den_ptr
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%result = udiv i8 %num, %den
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store i8 %result, i8 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}udiv24_i16:
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; SI: V_CVT_F32_U32
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; SI: V_CVT_F32_U32
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; SI: V_RCP_F32
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; SI: V_CVT_U32_F32
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; EG: UINT_TO_FLT
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; EG-DAG: UINT_TO_FLT
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; EG-DAG: RECIP_IEEE
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; EG: FLT_TO_UINT
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define void @udiv24_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %in) {
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%den_ptr = getelementptr i16 addrspace(1)* %in, i16 1
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%num = load i16 addrspace(1) * %in, align 2
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%den = load i16 addrspace(1) * %den_ptr, align 2
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%result = udiv i16 %num, %den
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store i16 %result, i16 addrspace(1)* %out, align 2
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ret void
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}
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; FUNC-LABEL: {{^}}udiv24_i32:
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; SI: V_CVT_F32_U32
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; SI-DAG: V_CVT_F32_U32
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; SI-DAG: V_RCP_F32
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; SI: V_CVT_U32_F32
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; EG: UINT_TO_FLT
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; EG-DAG: UINT_TO_FLT
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; EG-DAG: RECIP_IEEE
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; EG: FLT_TO_UINT
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define void @udiv24_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in, align 4
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%den = load i32 addrspace(1) * %den_ptr, align 4
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%num.i24.0 = shl i32 %num, 8
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%den.i24.0 = shl i32 %den, 8
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%num.i24 = lshr i32 %num.i24.0, 8
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%den.i24 = lshr i32 %den.i24.0, 8
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%result = udiv i32 %num.i24, %den.i24
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}udiv25_i32:
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; RCP_IFLAG is for URECIP in the full 32b alg
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; SI: V_RCP_IFLAG
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; SI-NOT: V_RCP_F32
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; EG-NOT: UINT_TO_FLT
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; EG-NOT: RECIP_IEEE
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define void @udiv25_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in, align 4
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%den = load i32 addrspace(1) * %den_ptr, align 4
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%num.i24.0 = shl i32 %num, 7
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%den.i24.0 = shl i32 %den, 7
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%num.i24 = lshr i32 %num.i24.0, 7
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%den.i24 = lshr i32 %den.i24.0, 7
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%result = udiv i32 %num.i24, %den.i24
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}test_no_udiv24_i32_1:
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; RCP_IFLAG is for URECIP in the full 32b alg
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; SI: V_RCP_IFLAG
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; SI-NOT: V_RCP_F32
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; EG-NOT: UINT_TO_FLT
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; EG-NOT: RECIP_IEEE
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define void @test_no_udiv24_i32_1(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in, align 4
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%den = load i32 addrspace(1) * %den_ptr, align 4
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%num.i24.0 = shl i32 %num, 8
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%den.i24.0 = shl i32 %den, 7
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%num.i24 = lshr i32 %num.i24.0, 8
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%den.i24 = lshr i32 %den.i24.0, 7
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%result = udiv i32 %num.i24, %den.i24
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}test_no_udiv24_i32_2:
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; RCP_IFLAG is for URECIP in the full 32b alg
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; SI: V_RCP_IFLAG
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; SI-NOT: V_RCP_F32
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; EG-NOT: UINT_TO_FLT
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; EG-NOT: RECIP_IEEE
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define void @test_no_udiv24_i32_2(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in, align 4
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%den = load i32 addrspace(1) * %den_ptr, align 4
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%num.i24.0 = shl i32 %num, 7
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%den.i24.0 = shl i32 %den, 8
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%num.i24 = lshr i32 %num.i24.0, 7
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%den.i24 = lshr i32 %den.i24.0, 8
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%result = udiv i32 %num.i24, %den.i24
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}urem24_i8:
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; SI: V_CVT_F32_UBYTE
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; SI: V_CVT_F32_UBYTE
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; SI: V_RCP_F32
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; SI: V_CVT_U32_F32
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; EG: UINT_TO_FLT
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; EG-DAG: UINT_TO_FLT
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; EG-DAG: RECIP_IEEE
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; EG: FLT_TO_UINT
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define void @urem24_i8(i8 addrspace(1)* %out, i8 addrspace(1)* %in) {
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%den_ptr = getelementptr i8 addrspace(1)* %in, i8 1
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%num = load i8 addrspace(1) * %in
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%den = load i8 addrspace(1) * %den_ptr
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%result = urem i8 %num, %den
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store i8 %result, i8 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}urem24_i16:
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; SI: V_CVT_F32_U32
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; SI: V_CVT_F32_U32
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; SI: V_RCP_F32
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; SI: V_CVT_U32_F32
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; EG: UINT_TO_FLT
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; EG-DAG: UINT_TO_FLT
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; EG-DAG: RECIP_IEEE
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; EG: FLT_TO_UINT
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define void @urem24_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %in) {
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%den_ptr = getelementptr i16 addrspace(1)* %in, i16 1
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%num = load i16 addrspace(1) * %in, align 2
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%den = load i16 addrspace(1) * %den_ptr, align 2
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%result = urem i16 %num, %den
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store i16 %result, i16 addrspace(1)* %out, align 2
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ret void
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}
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; FUNC-LABEL: {{^}}urem24_i32:
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; SI: V_CVT_F32_U32
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; SI: V_CVT_F32_U32
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; SI: V_RCP_F32
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; SI: V_CVT_U32_F32
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; EG: UINT_TO_FLT
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; EG-DAG: UINT_TO_FLT
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; EG-DAG: RECIP_IEEE
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; EG: FLT_TO_UINT
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define void @urem24_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in, align 4
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%den = load i32 addrspace(1) * %den_ptr, align 4
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%num.i24.0 = shl i32 %num, 8
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%den.i24.0 = shl i32 %den, 8
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%num.i24 = lshr i32 %num.i24.0, 8
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%den.i24 = lshr i32 %den.i24.0, 8
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%result = urem i32 %num.i24, %den.i24
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}urem25_i32:
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; RCP_IFLAG is for URECIP in the full 32b alg
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; SI: V_RCP_IFLAG
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; SI-NOT: V_RCP_F32
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; EG-NOT: UINT_TO_FLT
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; EG-NOT: RECIP_IEEE
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define void @urem25_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in, align 4
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%den = load i32 addrspace(1) * %den_ptr, align 4
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%num.i24.0 = shl i32 %num, 7
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%den.i24.0 = shl i32 %den, 7
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%num.i24 = lshr i32 %num.i24.0, 7
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%den.i24 = lshr i32 %den.i24.0, 7
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%result = urem i32 %num.i24, %den.i24
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}test_no_urem24_i32_1:
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; RCP_IFLAG is for URECIP in the full 32b alg
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; SI: V_RCP_IFLAG
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; SI-NOT: V_RCP_F32
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; EG-NOT: UINT_TO_FLT
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; EG-NOT: RECIP_IEEE
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define void @test_no_urem24_i32_1(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in, align 4
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%den = load i32 addrspace(1) * %den_ptr, align 4
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%num.i24.0 = shl i32 %num, 8
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%den.i24.0 = shl i32 %den, 7
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%num.i24 = lshr i32 %num.i24.0, 8
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%den.i24 = lshr i32 %den.i24.0, 7
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%result = urem i32 %num.i24, %den.i24
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}test_no_urem24_i32_2:
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; RCP_IFLAG is for URECIP in the full 32b alg
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; SI: V_RCP_IFLAG
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; SI-NOT: V_RCP_F32
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; EG-NOT: UINT_TO_FLT
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; EG-NOT: RECIP_IEEE
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define void @test_no_urem24_i32_2(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in, align 4
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%den = load i32 addrspace(1) * %den_ptr, align 4
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%num.i24.0 = shl i32 %num, 7
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%den.i24.0 = shl i32 %den, 8
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%num.i24 = lshr i32 %num.i24.0, 7
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%den.i24 = lshr i32 %den.i24.0, 8
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%result = urem i32 %num.i24, %den.i24
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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