Benjamin Kramer 4afbd3e941 X86: When lowering v8i32 himuls use the correct shuffle masks for AVX2. ...

Turns out my trick of using the same masks for SSE4.1 and AVX2 didn't work out
as we have to blend two vectors. While there remove unecessary cross-lane moves
from the shuffles so the backend can lower it to palignr instead of vperm.

Fixes PR20118, a miscompilation of vector sdiv by constant on AVX2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212611 91177308-0d34-0410-b5e6-96231b3b80d8

2014-07-09 11:12:39 +00:00

..

AArch64

AArch64: Better codegen for loading from __fp16.

2014-07-08 23:28:48 +00:00

ARM

ARM: properly lower dllimport'ed global values

2014-07-07 05:18:35 +00:00

CPP

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Generic

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Hexagon

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Inputs

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Mips

[mips][mips64r6] Correct select patterns that have the condition or true/false values backwards

2014-07-09 10:47:26 +00:00

MSP430

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NVPTX

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PowerPC

[PowerPC] Fix testcase regression

2014-07-07 19:41:54 +00:00

R600

R600: Fix mishandling of load / store chains.

2014-07-07 18:34:45 +00:00

SPARC

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SystemZ

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Thumb

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Thumb2

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X86

X86: When lowering v8i32 himuls use the correct shuffle masks for AVX2.

2014-07-09 11:12:39 +00:00

XCore

llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.

2014-07-04 11:58:03 +00:00