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ae3a0be92e
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
37 lines
1.4 KiB
LLVM
37 lines
1.4 KiB
LLVM
; RUN: llvm-as < %s | llc -march=ppc64
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define i128 @__fixsfdi(float %a) {
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entry:
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%a_addr = alloca float ; <float*> [#uses=4]
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%retval = alloca i128, align 16 ; <i128*> [#uses=2]
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%tmp = alloca i128, align 16 ; <i128*> [#uses=3]
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%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
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store float %a, float* %a_addr
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%tmp1 = load float* %a_addr, align 4 ; <float> [#uses=1]
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%tmp2 = fcmp olt float %tmp1, 0.000000e+00 ; <i1> [#uses=1]
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%tmp23 = zext i1 %tmp2 to i8 ; <i8> [#uses=1]
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%toBool = icmp ne i8 %tmp23, 0 ; <i1> [#uses=1]
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br i1 %toBool, label %bb, label %bb8
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bb: ; preds = %entry
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%tmp4 = load float* %a_addr, align 4 ; <float> [#uses=1]
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%tmp5 = fsub float -0.000000e+00, %tmp4 ; <float> [#uses=1]
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%tmp6 = call i128 @__fixunssfDI( float %tmp5 ) nounwind ; <i128> [#uses=1]
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%tmp7 = sub i128 0, %tmp6 ; <i128> [#uses=1]
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store i128 %tmp7, i128* %tmp, align 16
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br label %bb11
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bb8: ; preds = %entry
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%tmp9 = load float* %a_addr, align 4 ; <float> [#uses=1]
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%tmp10 = call i128 @__fixunssfDI( float %tmp9 ) nounwind ; <i128> [#uses=1]
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store i128 %tmp10, i128* %tmp, align 16
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br label %bb11
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bb11: ; preds = %bb8, %bb
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%tmp12 = load i128* %tmp, align 16 ; <i128> [#uses=1]
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store i128 %tmp12, i128* %retval, align 16
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br label %return
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return: ; preds = %bb11
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%retval13 = load i128* %retval ; <i128> [#uses=1]
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ret i128 %retval13
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}
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declare i128 @__fixunssfDI(float)
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