llvm-6502/lib/Target
Nate Begeman 4b46fc094d Add the "ppc specific" setcc-equivalent select_cc cases
Prefer 'neg X' to 'subfic 0, X' since it does not set XER[CA]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23000 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-24 04:59:21 +00:00
..
Alpha Put register classes in namespaces 2005-08-19 18:50:46 +00:00
CBackend Fix PR618 and Regression/CodeGen/CBackend/2005-08-23-Fmod.ll by not emitting 2005-08-23 20:22:50 +00:00
IA64 Fix a crash I introduced into the IA64 backend with my copyfromreg change. 2005-08-22 21:33:11 +00:00
PowerPC Add the "ppc specific" setcc-equivalent select_cc cases 2005-08-24 04:59:21 +00:00
Skeleton put reg classes into namespace 2005-08-19 18:53:43 +00:00
Sparc Split RegisterClass 'Methods' into MethodProtos and MethodBodies 2005-08-19 19:13:20 +00:00
SparcV8 Split RegisterClass 'Methods' into MethodProtos and MethodBodies 2005-08-19 19:13:20 +00:00
SparcV9 Put register classes into namespaces 2005-08-19 18:51:57 +00:00
X86 Adjust to new livevars interface 2005-08-23 23:41:14 +00:00
Makefile
MRegisterInfo.cpp
Target.td Split RegisterClass 'Methods' into MethodProtos and MethodBodies 2005-08-19 19:13:20 +00:00
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp Remove the X86 and PowerPC Simple instruction selectors; their time has 2005-08-18 23:53:15 +00:00
TargetMachineRegistry.cpp
TargetSchedInfo.cpp
TargetSubtarget.cpp