mirror of
https://github.com/c64scene-ar/llvm-6502.git
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547ba56bd0
The operand flag word for ISD::INLINEASM nodes now contains a 15-bit memory constraint ID when the operand kind is Kind_Mem. This constraint ID is a numeric equivalent to the constraint code string and is converted with a target specific hook in TargetLowering. This patch maps all memory constraints to InlineAsm::Constraint_m so there is no functional change at this point. It just proves that using these previously unused bits in the encoding of the flag word doesn't break anything. The next patch will make each target preserve the current mapping of everything to Constraint_m for itself while changing the target independent implementation of the hook to return Constraint_Unknown appropriately. Each target will then be adapted in separate patches to use appropriate Constraint_* values. PR22883 was caused the matching operands copying the whole of the operand flags for the matched operand. This included the constraint id which needed to be replaced with the operand number. This has been fixed with a conversion function. Following on from this, matching operands also used the operand number as the constraint id. This has been fixed by looking up the matched operand and taking it from there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232165 91177308-0d34-0410-b5e6-96231b3b80d8
276 lines
8.3 KiB
C++
276 lines
8.3 KiB
C++
//===-- MipsELFObjectWriter.cpp - Mips ELF Writer -------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/MipsBaseInfo.h"
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#include "MCTargetDesc/MipsFixupKinds.h"
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#include "MCTargetDesc/MipsMCTargetDesc.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCELF.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCSection.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/ErrorHandling.h"
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#include <list>
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using namespace llvm;
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namespace {
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class MipsELFObjectWriter : public MCELFObjectTargetWriter {
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public:
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MipsELFObjectWriter(bool _is64Bit, uint8_t OSABI,
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bool _isN64, bool IsLittleEndian);
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virtual ~MipsELFObjectWriter();
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unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,
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bool IsPCRel) const override;
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bool needsRelocateWithSymbol(const MCSymbolData &SD,
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unsigned Type) const override;
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};
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}
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MipsELFObjectWriter::MipsELFObjectWriter(bool _is64Bit, uint8_t OSABI,
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bool _isN64, bool IsLittleEndian)
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: MCELFObjectTargetWriter(_is64Bit, OSABI, ELF::EM_MIPS,
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/*HasRelocationAddend*/ (_isN64) ? true : false,
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/*IsN64*/ _isN64) {}
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MipsELFObjectWriter::~MipsELFObjectWriter() {}
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unsigned MipsELFObjectWriter::GetRelocType(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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// determine the type of the relocation
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unsigned Type = (unsigned)ELF::R_MIPS_NONE;
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unsigned Kind = (unsigned)Fixup.getKind();
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switch (Kind) {
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default:
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llvm_unreachable("invalid fixup kind!");
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case Mips::fixup_Mips_32:
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case FK_Data_4:
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Type = ELF::R_MIPS_32;
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break;
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case Mips::fixup_Mips_64:
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case FK_Data_8:
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Type = ELF::R_MIPS_64;
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break;
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case FK_GPRel_4:
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if (isN64()) {
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Type = setRType((unsigned)ELF::R_MIPS_GPREL32, Type);
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Type = setRType2((unsigned)ELF::R_MIPS_64, Type);
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Type = setRType3((unsigned)ELF::R_MIPS_NONE, Type);
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}
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else
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Type = ELF::R_MIPS_GPREL32;
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break;
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case Mips::fixup_Mips_GPREL16:
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Type = ELF::R_MIPS_GPREL16;
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break;
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case Mips::fixup_Mips_26:
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Type = ELF::R_MIPS_26;
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break;
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case Mips::fixup_Mips_CALL16:
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Type = ELF::R_MIPS_CALL16;
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break;
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case Mips::fixup_Mips_GOT_Global:
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case Mips::fixup_Mips_GOT_Local:
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Type = ELF::R_MIPS_GOT16;
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break;
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case Mips::fixup_Mips_HI16:
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Type = ELF::R_MIPS_HI16;
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break;
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case Mips::fixup_Mips_LO16:
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Type = ELF::R_MIPS_LO16;
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break;
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case Mips::fixup_Mips_TLSGD:
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Type = ELF::R_MIPS_TLS_GD;
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break;
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case Mips::fixup_Mips_GOTTPREL:
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Type = ELF::R_MIPS_TLS_GOTTPREL;
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break;
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case Mips::fixup_Mips_TPREL_HI:
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Type = ELF::R_MIPS_TLS_TPREL_HI16;
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break;
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case Mips::fixup_Mips_TPREL_LO:
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Type = ELF::R_MIPS_TLS_TPREL_LO16;
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break;
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case Mips::fixup_Mips_TLSLDM:
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Type = ELF::R_MIPS_TLS_LDM;
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break;
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case Mips::fixup_Mips_DTPREL_HI:
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Type = ELF::R_MIPS_TLS_DTPREL_HI16;
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break;
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case Mips::fixup_Mips_DTPREL_LO:
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Type = ELF::R_MIPS_TLS_DTPREL_LO16;
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break;
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case Mips::fixup_Mips_Branch_PCRel:
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case Mips::fixup_Mips_PC16:
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Type = ELF::R_MIPS_PC16;
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break;
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case Mips::fixup_Mips_GOT_PAGE:
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Type = ELF::R_MIPS_GOT_PAGE;
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break;
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case Mips::fixup_Mips_GOT_OFST:
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Type = ELF::R_MIPS_GOT_OFST;
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break;
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case Mips::fixup_Mips_GOT_DISP:
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Type = ELF::R_MIPS_GOT_DISP;
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break;
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case Mips::fixup_Mips_GPOFF_HI:
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Type = setRType((unsigned)ELF::R_MIPS_GPREL16, Type);
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Type = setRType2((unsigned)ELF::R_MIPS_SUB, Type);
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Type = setRType3((unsigned)ELF::R_MIPS_HI16, Type);
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break;
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case Mips::fixup_Mips_GPOFF_LO:
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Type = setRType((unsigned)ELF::R_MIPS_GPREL16, Type);
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Type = setRType2((unsigned)ELF::R_MIPS_SUB, Type);
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Type = setRType3((unsigned)ELF::R_MIPS_LO16, Type);
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break;
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case Mips::fixup_Mips_HIGHER:
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Type = ELF::R_MIPS_HIGHER;
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break;
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case Mips::fixup_Mips_HIGHEST:
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Type = ELF::R_MIPS_HIGHEST;
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break;
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case Mips::fixup_Mips_GOT_HI16:
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Type = ELF::R_MIPS_GOT_HI16;
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break;
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case Mips::fixup_Mips_GOT_LO16:
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Type = ELF::R_MIPS_GOT_LO16;
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break;
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case Mips::fixup_Mips_CALL_HI16:
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Type = ELF::R_MIPS_CALL_HI16;
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break;
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case Mips::fixup_Mips_CALL_LO16:
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Type = ELF::R_MIPS_CALL_LO16;
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break;
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case Mips::fixup_MICROMIPS_26_S1:
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Type = ELF::R_MICROMIPS_26_S1;
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break;
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case Mips::fixup_MICROMIPS_HI16:
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Type = ELF::R_MICROMIPS_HI16;
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break;
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case Mips::fixup_MICROMIPS_LO16:
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Type = ELF::R_MICROMIPS_LO16;
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break;
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case Mips::fixup_MICROMIPS_GOT16:
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Type = ELF::R_MICROMIPS_GOT16;
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break;
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case Mips::fixup_MICROMIPS_PC7_S1:
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Type = ELF::R_MICROMIPS_PC7_S1;
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break;
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case Mips::fixup_MICROMIPS_PC10_S1:
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Type = ELF::R_MICROMIPS_PC10_S1;
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break;
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case Mips::fixup_MICROMIPS_PC16_S1:
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Type = ELF::R_MICROMIPS_PC16_S1;
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break;
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case Mips::fixup_MICROMIPS_CALL16:
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Type = ELF::R_MICROMIPS_CALL16;
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break;
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case Mips::fixup_MICROMIPS_GOT_DISP:
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Type = ELF::R_MICROMIPS_GOT_DISP;
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break;
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case Mips::fixup_MICROMIPS_GOT_PAGE:
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Type = ELF::R_MICROMIPS_GOT_PAGE;
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break;
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case Mips::fixup_MICROMIPS_GOT_OFST:
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Type = ELF::R_MICROMIPS_GOT_OFST;
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break;
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case Mips::fixup_MICROMIPS_TLS_GD:
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Type = ELF::R_MICROMIPS_TLS_GD;
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break;
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case Mips::fixup_MICROMIPS_TLS_LDM:
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Type = ELF::R_MICROMIPS_TLS_LDM;
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break;
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case Mips::fixup_MICROMIPS_TLS_DTPREL_HI16:
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Type = ELF::R_MICROMIPS_TLS_DTPREL_HI16;
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break;
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case Mips::fixup_MICROMIPS_TLS_DTPREL_LO16:
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Type = ELF::R_MICROMIPS_TLS_DTPREL_LO16;
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break;
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case Mips::fixup_MICROMIPS_TLS_TPREL_HI16:
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Type = ELF::R_MICROMIPS_TLS_TPREL_HI16;
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break;
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case Mips::fixup_MICROMIPS_TLS_TPREL_LO16:
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Type = ELF::R_MICROMIPS_TLS_TPREL_LO16;
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break;
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case Mips::fixup_MIPS_PC19_S2:
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Type = ELF::R_MIPS_PC19_S2;
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break;
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case Mips::fixup_MIPS_PC18_S3:
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Type = ELF::R_MIPS_PC18_S3;
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break;
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case Mips::fixup_MIPS_PC21_S2:
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Type = ELF::R_MIPS_PC21_S2;
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break;
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case Mips::fixup_MIPS_PC26_S2:
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Type = ELF::R_MIPS_PC26_S2;
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break;
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case Mips::fixup_MIPS_PCHI16:
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Type = ELF::R_MIPS_PCHI16;
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break;
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case Mips::fixup_MIPS_PCLO16:
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Type = ELF::R_MIPS_PCLO16;
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break;
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}
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return Type;
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}
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bool
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MipsELFObjectWriter::needsRelocateWithSymbol(const MCSymbolData &SD,
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unsigned Type) const {
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// FIXME: This is extremely conservative. This really needs to use a
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// whitelist with a clear explanation for why each realocation needs to
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// point to the symbol, not to the section.
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switch (Type) {
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default:
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return true;
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case ELF::R_MIPS_GOT16:
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case ELF::R_MIPS16_GOT16:
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case ELF::R_MICROMIPS_GOT16:
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llvm_unreachable("Should have been handled already");
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// These relocations might be paired with another relocation. The pairing is
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// done by the static linker by matching the symbol. Since we only see one
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// relocation at a time, we have to force them to relocate with a symbol to
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// avoid ending up with a pair where one points to a section and another
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// points to a symbol.
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case ELF::R_MIPS_HI16:
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case ELF::R_MIPS16_HI16:
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case ELF::R_MICROMIPS_HI16:
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case ELF::R_MIPS_LO16:
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case ELF::R_MIPS16_LO16:
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case ELF::R_MICROMIPS_LO16:
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return true;
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case ELF::R_MIPS_32:
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if (MCELF::getOther(SD) & (ELF::STO_MIPS_MICROMIPS >> 2))
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return true;
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// falltrough
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case ELF::R_MIPS_26:
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case ELF::R_MIPS_64:
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case ELF::R_MIPS_GPREL16:
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return false;
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}
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}
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MCObjectWriter *llvm::createMipsELFObjectWriter(raw_ostream &OS,
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uint8_t OSABI,
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bool IsLittleEndian,
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bool Is64Bit) {
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MCELFObjectTargetWriter *MOTW = new MipsELFObjectWriter(Is64Bit, OSABI,
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(Is64Bit) ? true : false,
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IsLittleEndian);
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return createELFObjectWriter(MOTW, OS, IsLittleEndian);
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}
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