Jakob Stoklund Olesen 4ba6916a98 Add a MachineOperand::isTied() flag. ... While in SSA form, a MachineInstr can have pairs of tied defs and uses. The tied operands are used to represent read-modify-write operands that must be assigned the same physical register. Previously, tied operand pairs were computed from fixed MCInstrDesc fields, or by using black magic on inline assembly instructions. The isTied flag makes it possible to add tied operands to any instruction while getting rid of (some of) the inlineasm magic. Tied operands on normal instructions are needed to represent predicated individual instructions in SSA form. An extra <tied,imp-use> operand is required to represent the output value when the instruction predicate is false. Adding a predicate to: %vreg0<def> = ADD %vreg1, %vreg2 Will look like: %vreg0<tied,def> = ADD %vreg1, %vreg2, pred:3, %vreg7<tied,imp-use> The virtual register %vreg7 is the value given to %vreg0 when the predicate is false. It will be assigned the same physreg as %vreg0. This commit adds the isTied flag and sets it based on MCInstrDesc when building an instruction. The flag is not used for anything yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162774 91177308-0d34-0410-b5e6-96231b3b80d8		2012-08-28 18:34:41 +00:00
..
ADT	Add the Freescale vendor to Triple.	2012-08-28 02:10:30 +00:00
Analysis	Remove the the block_node_iterator of Region, replace it by the block_iterator.	2012-08-27 13:49:24 +00:00
Assembly
Bitcode	Fix a bunch of -Wdocumentation warnings.	2012-08-23 16:54:08 +00:00
CodeGen	Add a MachineOperand::isTied() flag.	2012-08-28 18:34:41 +00:00
Config	Add support for detecting libxml for Dmitri's work. He'll	2012-08-03 19:47:19 +00:00
DebugInfo	Add basic support for .debug_ranges section to LLVM's DebugInfo library.	2012-08-27 07:17:47 +00:00
ExecutionEngine	Fixed few warnings.	2012-07-19 04:50:12 +00:00
MC	Lower constant pools and jump tables via TOC on PPC64/SVR4.	2012-08-24 16:26:02 +00:00
Object	Fix misaligned access in MachO object file reader: despite containing an	2012-08-21 20:52:03 +00:00
Support	Fix integer undefined behavior due to signed left shift overflow in LLVM.	2012-08-24 23:29:28 +00:00
TableGen	Tristate mayLoad, mayStore, and hasSideEffects.	2012-08-23 19:34:46 +00:00
Target	Remove extra MayLoad/MayStore flags from atomic_load/store.	2012-08-28 03:11:32 +00:00
Transforms	add EmitStrNLen()	2012-07-25 17:18:59 +00:00
Argument.h
Attributes.h	[ms-inline asm] Add a new Inline Asm Non-Standard Dialect attribute.	2012-08-10 00:00:22 +00:00
AutoUpgrade.h
BasicBlock.h
CallGraphSCCPass.h
CallingConv.h
CMakeLists.txt	llvm/include/llvm/CMakeLists.txt: Cut dependency to intrinsics_gen.	2012-07-06 15:55:39 +00:00
Constant.h
Constants.h
DebugInfo.h	Add a print method to the ObjC property object.	2012-07-06 19:12:31 +00:00
DefaultPasses.h
DerivedTypes.h
DIBuilder.h	Fix a bunch of -Wdocumentation warnings.	2012-08-23 16:54:08 +00:00
Function.h
GlobalAlias.h
GlobalValue.h	Change the linker_private_weak_def_auto' linkage to linkonce_odr_auto_hide' to	2012-08-17 18:33:14 +00:00
GlobalVariable.h	Clean-up after r159077.	2012-06-23 12:14:23 +00:00
GVMaterializer.h
InitializePasses.h	Start scaffolding for a MachineTraceMetrics analysis pass.	2012-07-26 18:38:11 +00:00
InlineAsm.h
InstrTypes.h	Fix a bunch of -Wdocumentation warnings.	2012-08-23 16:54:08 +00:00
Instruction.def
Instruction.h	Refactor operation equivalence checking in BBVectorize by extending Instruction::isSameOperationAs.	2012-06-28 05:42:26 +00:00
Instructions.h	add CallSite/CallInst/InvokeInst::hasFnAttr()	2012-06-25 16:16:58 +00:00
IntrinsicInst.h
Intrinsics.h
Intrinsics.td	Add support for v16i32/v16i64 into the code generator. This is required for backends that use i32/i64 vectors for the getSetCCResultType function.	2012-07-26 21:22:00 +00:00
IntrinsicsARM.td
IntrinsicsCellSPU.td
IntrinsicsHexagon.td	Test commit.	2012-08-17 06:36:26 +00:00
IntrinsicsMips.td	Support MIPS DSP Rev2 intrinsics.	2012-08-27 12:29:01 +00:00
IntrinsicsNVVM.td
IntrinsicsPowerPC.td
IntrinsicsX86.td	Mark avx2 maskstore has ReadWriteArgMem. Mark broadcast and maskload as ReadArgMem.	2012-08-26 22:01:42 +00:00
IntrinsicsXCore.td
IRBuilder.h	Add support for attaching branch weight metadata directly from the IRBuilder.	2012-07-16 07:45:06 +00:00
LinkAllPasses.h
LinkAllVMCore.h
Linker.h
LLVMContext.h
MDBuilder.h	Update the header guard I missed when moving the header.	2012-07-15 23:45:20 +00:00
Metadata.h
Module.h	Move the "findUsedStructTypes" functionality outside of the Module class.	2012-08-03 00:30:35 +00:00
OperandTraits.h
Operator.h
Pass.h
PassAnalysisSupport.h
PassManager.h
PassManagers.h
PassRegistry.h
PassSupport.h
SymbolTableListTraits.h
Type.h
TypeBuilder.h	Move llvm/Support/TypeBuilder.h -> llvm/TypeBuilder.h. This completes	2012-07-15 23:45:24 +00:00
TypeFinder.h	Move the "findUsedStructTypes" functionality outside of the Module class.	2012-08-03 00:30:35 +00:00
Use.h
User.h
Value.h
ValueSymbolTable.h