mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-26 23:29:22 +00:00
This contains all the previous patches + getlod support on top of it. It doesn't use SDNodes anymore, so it's quite small. It also adds v16i8 to SReg_128, which is used for the sampler descriptor. Reviewed-by: Tom Stellard git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211228 91177308-0d34-0410-b5e6-96231b3b80d8
509 lines
28 KiB
LLVM
509 lines
28 KiB
LLVM
;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck %s
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;CHECK-LABEL: @gather4_v2
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;CHECK: IMAGE_GATHER4 {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_v2() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.v2i32(<2 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4
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;CHECK: IMAGE_GATHER4 {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_cl
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;CHECK: IMAGE_GATHER4_CL {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_cl() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.cl.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_l
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;CHECK: IMAGE_GATHER4_L {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_l() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.l.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_b
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;CHECK: IMAGE_GATHER4_B {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_b() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.b.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_b_cl
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;CHECK: IMAGE_GATHER4_B_CL {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_b_cl() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.b.cl.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_b_cl_v8
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;CHECK: IMAGE_GATHER4_B_CL {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_b_cl_v8() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.b.cl.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_lz_v2
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;CHECK: IMAGE_GATHER4_LZ {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_lz_v2() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.lz.v2i32(<2 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_lz
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;CHECK: IMAGE_GATHER4_LZ {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_lz() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.lz.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_o
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;CHECK: IMAGE_GATHER4_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_o() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.o.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_cl_o
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;CHECK: IMAGE_GATHER4_CL_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_cl_o() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.cl.o.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_cl_o_v8
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;CHECK: IMAGE_GATHER4_CL_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_cl_o_v8() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.cl.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_l_o
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;CHECK: IMAGE_GATHER4_L_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_l_o() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.l.o.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_l_o_v8
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;CHECK: IMAGE_GATHER4_L_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_l_o_v8() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.l.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_b_o
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;CHECK: IMAGE_GATHER4_B_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_b_o() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.b.o.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_b_o_v8
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;CHECK: IMAGE_GATHER4_B_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_b_o_v8() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.b.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_b_cl_o
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;CHECK: IMAGE_GATHER4_B_CL_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_b_cl_o() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.b.cl.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_lz_o
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;CHECK: IMAGE_GATHER4_LZ_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_lz_o() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.lz.o.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
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%r2 = extractelement <4 x float> %r, i32 2
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%r3 = extractelement <4 x float> %r, i32 3
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
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ret void
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}
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;CHECK-LABEL: @gather4_c
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;CHECK: IMAGE_GATHER4_C {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @gather4_c() #0 {
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main_body:
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%r = call <4 x float> @llvm.SI.gather4.c.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
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%r0 = extractelement <4 x float> %r, i32 0
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%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @gather4_c_cl
|
|
;CHECK: IMAGE_GATHER4_C_CL {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @gather4_c_cl() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.gather4.c.cl.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @gather4_c_cl_v8
|
|
;CHECK: IMAGE_GATHER4_C_CL {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @gather4_c_cl_v8() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.gather4.c.cl.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @gather4_c_l
|
|
;CHECK: IMAGE_GATHER4_C_L {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @gather4_c_l() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.gather4.c.l.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @gather4_c_l_v8
|
|
;CHECK: IMAGE_GATHER4_C_L {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @gather4_c_l_v8() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.gather4.c.l.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @gather4_c_b
|
|
;CHECK: IMAGE_GATHER4_C_B {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @gather4_c_b() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.gather4.c.b.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @gather4_c_b_v8
|
|
;CHECK: IMAGE_GATHER4_C_B {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @gather4_c_b_v8() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.gather4.c.b.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @gather4_c_b_cl
|
|
;CHECK: IMAGE_GATHER4_C_B_CL {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @gather4_c_b_cl() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.gather4.c.b.cl.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @gather4_c_lz
|
|
;CHECK: IMAGE_GATHER4_C_LZ {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @gather4_c_lz() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.gather4.c.lz.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
|
|
|
|
;CHECK-LABEL: @gather4_c_o
|
|
;CHECK: IMAGE_GATHER4_C_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @gather4_c_o() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.gather4.c.o.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @gather4_c_o_v8
|
|
;CHECK: IMAGE_GATHER4_C_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @gather4_c_o_v8() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.gather4.c.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @gather4_c_cl_o
|
|
;CHECK: IMAGE_GATHER4_C_CL_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @gather4_c_cl_o() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.gather4.c.cl.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @gather4_c_l_o
|
|
;CHECK: IMAGE_GATHER4_C_L_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @gather4_c_l_o() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.gather4.c.l.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @gather4_c_b_o
|
|
;CHECK: IMAGE_GATHER4_C_B_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @gather4_c_b_o() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.gather4.c.b.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @gather4_c_b_cl_o
|
|
;CHECK: IMAGE_GATHER4_C_B_CL_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @gather4_c_b_cl_o() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.gather4.c.b.cl.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @gather4_c_lz_o
|
|
;CHECK: IMAGE_GATHER4_C_LZ_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @gather4_c_lz_o() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.gather4.c.lz.o.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
;CHECK-LABEL: @gather4_c_lz_o_v8
|
|
;CHECK: IMAGE_GATHER4_C_LZ_O {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
|
|
define void @gather4_c_lz_o_v8() #0 {
|
|
main_body:
|
|
%r = call <4 x float> @llvm.SI.gather4.c.lz.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0)
|
|
%r0 = extractelement <4 x float> %r, i32 0
|
|
%r1 = extractelement <4 x float> %r, i32 1
|
|
%r2 = extractelement <4 x float> %r, i32 2
|
|
%r3 = extractelement <4 x float> %r, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
|
|
ret void
|
|
}
|
|
|
|
|
|
|
|
declare <4 x float> @llvm.SI.gather4.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.gather4.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.gather4.cl.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.gather4.l.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.gather4.b.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.gather4.b.cl.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.gather4.b.cl.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.gather4.lz.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.gather4.lz.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
|
|
declare <4 x float> @llvm.SI.gather4.o.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.gather4.cl.o.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.gather4.cl.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.gather4.l.o.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
|
|
declare <4 x float> @llvm.SI.gather4.l.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.b.o.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.b.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.b.cl.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.lz.o.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.cl.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.cl.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.l.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.l.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.b.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.b.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.b.cl.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.lz.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.o.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.cl.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.l.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.b.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.b.cl.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.lz.o.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare <4 x float> @llvm.SI.gather4.c.lz.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1
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declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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attributes #0 = { "ShaderType"="0" }
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attributes #1 = { nounwind readnone }
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