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Based on the support for .req on ARM. The aarch64 variant has to keep track if the alias register was a vector register (v0-31) or a general purpose or VFP/Advanced SIMD ([bhsdq]0-31) register. Patch by Janne Grunau! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212161 91177308-0d34-0410-b5e6-96231b3b80d8
38 lines
1.0 KiB
ArmAsm
38 lines
1.0 KiB
ArmAsm
// RUN: not llvm-mc -triple aarch64-none-linux-gnu < %s 2>&1 | FileCheck --check-prefix=CHECK --check-prefix=CHECK-ERROR %s
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bar:
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fred .req x5
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fred .req x6
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// CHECK-ERROR: warning: ignoring redefinition of register alias 'fred'
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// CHECK-ERROR: fred .req x6
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// CHECK-ERROR: ^
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ada .req v2.8b
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// CHECK-ERROR: error: vector register without type specifier expected
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// CHECK-ERROR: ada .req v2.8b
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// CHECK-ERROR: ^
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bob .req lisa
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// CHECK-ERROR: error: register name or alias expected
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// CHECK-ERROR: bob .req lisa
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// CHECK-ERROR: ^
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lisa .req x1, 23
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// CHECK-ERROR: error: unexpected input in .req directive
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// CHECK-ERROR: lisa .req x1, 23
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// CHECK-ERROR: ^
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mov bob, fred
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// CHECK-ERROR: error: invalid operand for instruction
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// CHECK-ERROR: mov bob, fred
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// CHECK-ERROR: ^
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.unreq 1
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// CHECK-ERROR: error: unexpected input in .unreq directive.
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// CHECK-ERROR: .unreq 1
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// CHECK-ERROR: ^
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mov x1, fred
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// CHECK: mov x1, x5
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// CHECK-NOT: mov x1, x6
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