Nemanja Ivanovic 9ca031b6c6 Add direct moves to/from VSR and exploit them for FP/INT conversions ...

This patch corresponds to review:
http://reviews.llvm.org/D8928

It adds direct move instructions to/from VSX registers to GPR's. These are
exploited for FP <-> INT conversions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234682 91177308-0d34-0410-b5e6-96231b3b80d8

2015-04-11 10:40:42 +00:00

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deprecated-p7.s

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htm.s

Add Hardware Transactional Memory (HTM) Support

2015-03-25 19:36:23 +00:00

lcomm.s

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lit.local.cfg

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ppc32-ba.s

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ppc64-abiversion.s

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ppc64-encoding-4xx.s

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ppc64-encoding-6xx.s

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ppc64-encoding-bookII.s

Add support for part-word atomics for PPC

2015-03-10 20:51:07 +00:00

ppc64-encoding-bookIII.s

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ppc64-encoding-e500.s

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ppc64-encoding-ext.s

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ppc64-encoding-fp.s

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ppc64-encoding-spe.s

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ppc64-encoding-vmx.s

Add LLVM support for PPC cryptography builtins

2015-03-04 20:44:33 +00:00

ppc64-encoding.s

Add LLVM support for remaining integer divide and permute instructions from ISA 2.06

2015-04-09 23:54:37 +00:00

ppc64-errors.s

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ppc64-fixup-apply.s

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ppc64-fixup-explicit.s

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ppc64-fixups.s

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ppc64-initial-cfa.s

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ppc64-localentry-error1.s

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ppc64-localentry-error2.s

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ppc64-localentry.s

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ppc64-operands.s

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ppc64-regs.s

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ppc64-relocs-01.s

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ppc64-tls-relocs-01.s

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ppc-llong.s

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ppc-machine.s

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ppc-nop.s

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ppc-reloc.s

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ppc-word.s

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qpx.s

[PowerPC] Add support for the QPX vector instruction set

2015-02-25 01:06:45 +00:00

tls-gd-obj.s

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tls-ie-obj.s

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tls-ld-obj.s

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vsx.s

Add direct moves to/from VSR and exploit them for FP/INT conversions

2015-04-11 10:40:42 +00:00