Andrew Trick 4c34f71b81 Provide a target override for the latest regalloc heuristic. ...

This is a temporary workaround for native arm linux builds:
PR18996: Changing regalloc order breaks "lencod" on native arm linux builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202433 91177308-0d34-0410-b5e6-96231b3b80d8

2014-02-27 21:37:33 +00:00

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CostTable.h

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Target.td

[Stackmaps] Fix the ID type to be i64 also for stackmaps (as we claim in the documenation)

2014-02-12 22:17:10 +00:00

TargetCallingConv.h

Implement inalloca codegen for x86 with the new inalloca design

2014-01-31 23:50:57 +00:00

TargetCallingConv.td

LLVM-1163: AAPCS-VFP violation when CPRC allocated to stack

2014-02-07 11:19:53 +00:00

TargetFrameLowering.h

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TargetInstrInfo.h

Added a size field to the stack map record to handle subregister spills.

2013-11-17 01:36:23 +00:00

TargetIntrinsicInfo.h

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TargetItinerary.td

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TargetJITInfo.h

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TargetLibraryInfo.h

SimplifyLibCalls: Push TLI through the exp2->ldexp transform.

2014-02-04 20:27:23 +00:00

TargetLowering.h

move getNameWithPrefix and getSymbol to TargetMachine.

2014-02-19 20:30:41 +00:00

TargetLoweringObjectFile.h

Add back r201608, r201622, r201624 and r201625

2014-02-19 17:23:20 +00:00

TargetMachine.h

move getNameWithPrefix and getSymbol to TargetMachine.

2014-02-19 20:30:41 +00:00

TargetOpcodes.h

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TargetOptions.h

Make DisableIntegratedAS a TargetOption.

2014-02-21 03:13:54 +00:00

TargetRegisterInfo.h

Provide a target override for the latest regalloc heuristic.

2014-02-27 21:37:33 +00:00

TargetSchedule.td

Machine model comments. Explain a ProcessorUnit's BufferSize.

2013-12-05 17:55:53 +00:00

TargetSelectionDAG.td

X86: Resolve a long standing FIXME and properly isel pextr[bw].

2014-02-07 00:16:33 +00:00

TargetSelectionDAGInfo.h

Rename some member variables from TD to DL.

2014-02-18 15:33:12 +00:00

TargetSubtargetInfo.h

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