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- FCOPYSIGN nodes that have operands of different types were not handled. - Different code was generated depending on the endianness of the target. Additionally, code is added that emits INS and EXT instructions, if they are supported by target (they are R2 instructions). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154540 91177308-0d34-0410-b5e6-96231b3b80d8
51 lines
1.6 KiB
LLVM
51 lines
1.6 KiB
LLVM
; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s -check-prefix=64
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; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -mattr=n64 | FileCheck %s -check-prefix=64R2
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declare double @copysign(double, double) nounwind readnone
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declare float @copysignf(float, float) nounwind readnone
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define float @func2(float %d, double %f) nounwind readnone {
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entry:
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; 64: func2
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; 64: lui $[[T0:[0-9]+]], 32767
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; 64: ori $[[MSK0:[0-9]+]], $[[T0]], 65535
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; 64: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]]
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; 64: dsrl ${{[0-9]+}}, ${{[0-9]+}}, 63
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; 64: sll $[[SLL:[0-9]+]], ${{[0-9]+}}, 31
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; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[SLL]]
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; 64: mtc1 $[[OR]], $f0
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; 64R2: dext ${{[0-9]+}}, ${{[0-9]+}}, 63, 1
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; 64R2: ins $[[INS:[0-9]+]], ${{[0-9]+}}, 31, 1
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; 64R2: mtc1 $[[INS]], $f0
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%add = fadd float %d, 1.000000e+00
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%conv = fptrunc double %f to float
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%call = tail call float @copysignf(float %add, float %conv) nounwind readnone
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ret float %call
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}
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define double @func3(double %d, float %f) nounwind readnone {
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entry:
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; 64: daddiu $[[T0:[0-9]+]], $zero, 1
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; 64: dsll $[[T1:[0-9]+]], $[[T0]], 63
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; 64: daddiu $[[MSK0:[0-9]+]], $[[T1]], -1
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; 64: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]]
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; 64: srl ${{[0-9]+}}, ${{[0-9]+}}, 31
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; 64: dsll $[[DSLL:[0-9]+]], ${{[0-9]+}}, 63
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; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[DSLL]]
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; 64: dmtc1 $[[OR]], $f0
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; 64R2: ext ${{[0-9]+}}, ${{[0-9]+}}, 31, 1
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; 64R2: dins $[[INS:[0-9]+]], ${{[0-9]+}}, 63, 1
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; 64R2: dmtc1 $[[INS]], $f0
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%add = fadd double %d, 1.000000e+00
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%conv = fpext float %f to double
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%call = tail call double @copysign(double %add, double %conv) nounwind readnone
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ret double %call
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}
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