llvm-6502/test/CodeGen
Louis Gerbarg 4c77b29082 Fix incorrect invariant check in DAG Combine
Earlier this summer I fixed an issue where we were incorrectly combining
multiple loads that had different constraints such alignment, invariance,
temporality, etc. Apparently in one case I made copt paste error and swapped
alignment and invariance.

Tests included.

rdar://18816719

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220933 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-30 22:21:03 +00:00
..
AArch64 Fix incorrect invariant check in DAG Combine 2014-10-30 22:21:03 +00:00
ARM ARM: test default values for TAG_CPU_unaligned_access attribute. 2014-10-30 17:05:44 +00:00
CPP
Generic Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Hexagon Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Inputs Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Mips [mips] For N32/N64, structs must be passed in the upper bits of a register. 2014-10-24 13:09:19 +00:00
MSP430
NVPTX [NVPTX] aligned byte-buffers for vector return types 2014-10-25 03:46:16 +00:00
PowerPC [PATCH] Support select-cc for VSFRC when VSX is enabled 2014-10-22 16:58:20 +00:00
R600 R600/SI: Add another failing testcase for i1 copies 2014-10-22 05:30:42 +00:00
SPARC
SystemZ
Thumb [Thumb] Fix crash in Thumb1RegisterInfo::rewriteFrameIndex 2014-10-20 11:00:18 +00:00
Thumb2 ARM: Fix a bug which was causing convergence failure in constant-island pass. 2014-10-17 01:31:47 +00:00
X86 [x86] Simplify vector selection if condition value type matches vselect value type and true value is all ones or false value is all zeros. 2014-10-28 15:59:40 +00:00
XCore Fix a bit of confusion about .set and produce more readable assembly. 2014-10-21 01:17:30 +00:00